| Distance: | Resume alert | Resumes 21 - 30 of 6043 |
Software Engineer Intern
Binh Duong, Vietnam
... Familiar with computer architecture, data security, OOP, data structures & algorithms, and Verilog HDL. Actively seeking an internship opportunity to apply academic knowledge in real-world embedded or automotive projects. Strong self- learning ... - Jul 23
... Familiar with computer architecture, data security, OOP, data structures & algorithms, and Verilog HDL. Actively seeking an internship opportunity to apply academic knowledge in real-world embedded or automotive projects. Strong self- learning ... - Jul 23
Thực tập sinh - Nguyễn Văn Quý - Ngành điện tử viễn thông - ĐHBKĐN
Vietnam
... • Work independently • Time Management • Proteus Circuit Simulator • Basic Verilog Knowledge • Basic programming in C++,python and Matlab • Basic knowledge of Analog/Digital Circuit and Embedded Systeon • Knowledge digital signal processing... ... - Jul 22
... • Work independently • Time Management • Proteus Circuit Simulator • Basic Verilog Knowledge • Basic programming in C++,python and Matlab • Basic knowledge of Analog/Digital Circuit and Embedded Systeon • Knowledge digital signal processing... ... - Jul 22
North Carolina Software Development
Matthews, NC, 28105
... Technical Skills and Interests Languages:VHDL, Verilog, C/C++/C#, Python, Matlab, SQL FPGA tools: Quartus, Modelsim, NIOS II, Embedded hardware Relevent Coursework: Advance Logic Design, Data Structures & Algorithms, Operating Systems, Object ... - Jul 15
... Technical Skills and Interests Languages:VHDL, Verilog, C/C++/C#, Python, Matlab, SQL FPGA tools: Quartus, Modelsim, NIOS II, Embedded hardware Relevent Coursework: Advance Logic Design, Data Structures & Algorithms, Operating Systems, Object ... - Jul 15
Embedded C, PCB Design
Ho Chi Minh City, Vietnam
... 2021: Implementing a project on Embedded Programming by writing a program to display a perpetual calendar through LCD using an AVR microcontroller is ATMega128 9/2022 – 12/2022: Design sequential circuits using Verilog hardware description language. ... - Jul 15
... 2021: Implementing a project on Embedded Programming by writing a program to display a perpetual calendar through LCD using an AVR microcontroller is ATMega128 9/2022 – 12/2022: Design sequential circuits using Verilog hardware description language. ... - Jul 15
Electrical Engineering System Design
San Jose, CA
... Engineering, San Jose State University – San Jose, CA 3.39/4 Aug 2023 – May 2025 Course Work: Advanced Digital System Design and Synthesis, Soc Design & Verification with System Verilog, Logic Verification with UVM, Advanced Computer Architecture. ... - Jul 07
... Engineering, San Jose State University – San Jose, CA 3.39/4 Aug 2023 – May 2025 Course Work: Advanced Digital System Design and Synthesis, Soc Design & Verification with System Verilog, Logic Verification with UVM, Advanced Computer Architecture. ... - Jul 07
System Developer Embedded
Ho Chi Minh City, Vietnam
... Programming languages: Verilog HDL, C, C++, Python, MATLAB. Tools: Oracle VirtualBox, Quartus Prime, STM32CubeIDE. Soft Skills: Presentation, Problem-Solving, Critical Thinking. CERTIFICATIONS Certificate of course "STM32 Programming" of the FETEL. ... - Jul 07
... Programming languages: Verilog HDL, C, C++, Python, MATLAB. Tools: Oracle VirtualBox, Quartus Prime, STM32CubeIDE. Soft Skills: Presentation, Problem-Solving, Critical Thinking. CERTIFICATIONS Certificate of course "STM32 Programming" of the FETEL. ... - Jul 07
Design Engineer Circuit
San Jose, CA
... Languages: IBIS models, Verilog-A, HSpice, Python, Ocean scripting, TCL scripting, MATLAB, C, C++ Software: Cadence Virtuoso (ADE XL, Maestro, Layout XL), Ansys Totem, Ansys Helic, Matlab, Hspice, Cadence Allegro, JMP, Logisim, Avanwaves, Cosim ... - Jul 06
... Languages: IBIS models, Verilog-A, HSpice, Python, Ocean scripting, TCL scripting, MATLAB, C, C++ Software: Cadence Virtuoso (ADE XL, Maestro, Layout XL), Ansys Totem, Ansys Helic, Matlab, Hspice, Cadence Allegro, JMP, Logisim, Avanwaves, Cosim ... - Jul 06
Ts Sci Mixed Signal
San Jose, CA
... USA citizen DoD Cleared SAP TS SCI CI-Poly Secret SUMMARY: ● Peter has 18+ years of experience in digital logic and mixed signal analog design with proficiency in RTL transistor and device circuit design Verilog, VHDL, System Verilog, Design ... - Jul 04
... USA citizen DoD Cleared SAP TS SCI CI-Poly Secret SUMMARY: ● Peter has 18+ years of experience in digital logic and mixed signal analog design with proficiency in RTL transistor and device circuit design Verilog, VHDL, System Verilog, Design ... - Jul 04
R D Quality Engineer
Plano, TX, 75074
... OS : Unix, Linux HDL Languages : Verilog, VHDL HVL Language : System Verilog Simulation Tools : Model-Sim, gcc compiler, gdb debugger, Verilog XL, NcVHDL, VCS, NcVerilog (Cadence- Affirma). Synthesis Tools : DC Shell Linting Tool : Leda (Synopsys) ... - Jul 02
... OS : Unix, Linux HDL Languages : Verilog, VHDL HVL Language : System Verilog Simulation Tools : Model-Sim, gcc compiler, gdb debugger, Verilog XL, NcVHDL, VCS, NcVerilog (Cadence- Affirma). Synthesis Tools : DC Shell Linting Tool : Leda (Synopsys) ... - Jul 02
C++ Embedded Software
Bien Hoa, Dong Nai, Vietnam
... Able to read datasheets and basic circuit diagrams Digital & RTL Design: Familiar with Verilog HDL and RTL modeling. Able to design and simulate ALU, multiplexers, FSMs, using ModelSim and GTKWave Languages: English (basic), Vietnamese (native) ... - Jun 30
... Able to read datasheets and basic circuit diagrams Digital & RTL Design: Familiar with Verilog HDL and RTL modeling. Able to design and simulate ALU, multiplexers, FSMs, using ModelSim and GTKWave Languages: English (basic), Vietnamese (native) ... - Jun 30