Jorge Guerrero +1-336-***-****
# *******@*****.***
Ph.D. in Nanoengineering Electronics Engineer § GitHub Profile North Carolina A&T Sate University ï LinkedIn Profile FPGA Engineer with a strong foundation in Software Development and Nanotechnology. Driven by creating high-performance and innovative solutions, I take advantage of my interdisciplinary expertise to tackle complex engineering challenges, delivering simple and effective solutions that bridge electronics, software, and nanotechnology.
Education
•Ph.D. in Nanoengineering December, 2023
North Carolina A&T Sate University Greensboro, NC
•M.Sc. in Electronics Engineering December, 2012
Universidad del Valle Cali, Colombia
•B.Sc. Electronics Engineering April, 2007
Universidad del Valle Cali, Colombia
Experience
•Postdoctoral Researcher Mar 2024 - Jan 2025
Montana State University Bozeman, Montana
– Model and simulation of optical an electronic properties of transition metal dichalcogenides, metal halides, and low dimensional quantum materials.
– Designed a machine learning strategy to simulate the structural deformations of low dimensional materials.
•Research Assistant Aug 2019 - Dec 2023
North Carolina A&T State University Greensboro, North Carolina
– Created a practical File System for DNA data storage technology, using a versioning-based strategy.
– Designed a file encoding system for data storage in DNA using CRISPR technology.
– Developed a software for designing DNA origami nanostructures.
– Automated pipetting robots for DNA data storage.
•Assistant Professor Jan 2016 - Dec 2017
Universidad Santiago de Cali Cali, Colombia
Led courses in Digital Electronics, with practical applications on:
– Designing embedded processors and video games using FPGA devices.
– Developing compilers for custom processors, verified via logic gate simulation.
•Assistant Professor Aug 2009 - Dec 2015
Fundacion Universitaria Catolica Lumen Gentium Cali, Colombia Led courses for engineering:
– Digital Electronics, Electrical circuits, Software architectures, Frameworks.
•Research Assistant Aug 2008 - Dec 2012
Universidad del Valle Cali, Colombia
Design hardware modules in FPGA described using VHDL:
– Sparse Matrix-Vector multiplier.
– QR Eigensolver using a Systolic array of CORDIC units.
– Jacobi-Davidson Eigensolver codesign that integrates embedded processor, QR Eigensolver, and Matrix multipli- ers.
Technical Skills and Interests
Languages:VHDL, Verilog, C/C++/C#, Python, Matlab, SQL FPGA tools: Quartus, Modelsim, NIOS II, Embedded hardware Relevent Coursework: Advance Logic Design, Data Structures & Algorithms, Operating Systems, Object Oriented Programming, Software Engineering.
Areas of Interest: FPGA, Embedded hardware, Hardware architectures, Software development, Linux. Soft Skills: Problem Solving, Self-learning, Presentation, Adaptability