| Resume alert | Resumes 91 - 100 of 143 |
Project Chemistry
New Delhi, DL, India
... and TIN Containing LINSEED OIL Based Polymer: Synthesis, Characterization and dissertation EXPERIENCE Academic Project August 2012- May 2013 • Chemistry Teacher In Coaching Centre, New Delhi • Home Tutor for chemistry in Delhi for more than 3 years. ... - 2015 Mar 18
... and TIN Containing LINSEED OIL Based Polymer: Synthesis, Characterization and dissertation EXPERIENCE Academic Project August 2012- May 2013 • Chemistry Teacher In Coaching Centre, New Delhi • Home Tutor for chemistry in Delhi for more than 3 years. ... - 2015 Mar 18
College Engineer
New Delhi, DL, India
... Ranawat, Sadhana Singh, Girdhar pal Singh and Vinod Bhatt An efficient microwave irradiated, facile, one pot synthesis of anthracene derivatives [Published in World Journal of Pharmacy and Pharmaceutical Sciences, 3(1), 346-349, 2013. . Krishna K. ... - 2015 Mar 15
... Ranawat, Sadhana Singh, Girdhar pal Singh and Vinod Bhatt An efficient microwave irradiated, facile, one pot synthesis of anthracene derivatives [Published in World Journal of Pharmacy and Pharmaceutical Sciences, 3(1), 346-349, 2013. . Krishna K. ... - 2015 Mar 15
Verilog,C,C++
Greater Noida, UP, India
... • Coding in VHDL & FPGA synthesis. • Logic simulation is done using XILINX. TRAININGS ATTENDED: Company: Doordarshan Designation: Summer Trainee Duration: 23 June 2014 – 20 July 2014 Project Name: Television Transmission & Broadcasting System. IT ... - 2015 Feb 08
... • Coding in VHDL & FPGA synthesis. • Logic simulation is done using XILINX. TRAININGS ATTENDED: Company: Doordarshan Designation: Summer Trainee Duration: 23 June 2014 – 20 July 2014 Project Name: Television Transmission & Broadcasting System. IT ... - 2015 Feb 08
Engineering Engineer
New Delhi, DL, India
... Work & Research Experience (3 months) Efficient synthesis of Piece-Wise Affine functions on FPGA using VHDL and Altera Quartus II (Ecole Normale Superiere de Lyon (ENS de Lyon), Lyon, France) Summer Intern June 16, 2014 to August 31, 2014 • Worked ... - 2015 Feb 05
... Work & Research Experience (3 months) Efficient synthesis of Piece-Wise Affine functions on FPGA using VHDL and Altera Quartus II (Ecole Normale Superiere de Lyon (ENS de Lyon), Lyon, France) Summer Intern June 16, 2014 to August 31, 2014 • Worked ... - 2015 Feb 05
Pharmacy College
New Delhi, DL, India
... Synthesis and biological evaluation of some new azetidione analogues. Isolation of chemical constituents and pharmacological screening of plumeria acuminate. Isolation of chemical constituents and pharmacological study of Tephrosia purpurea. ... - 2015 Jan 03
... Synthesis and biological evaluation of some new azetidione analogues. Isolation of chemical constituents and pharmacological screening of plumeria acuminate. Isolation of chemical constituents and pharmacological study of Tephrosia purpurea. ... - 2015 Jan 03
Chemical Process Engineer
New Delhi, DL, India
... ACADEMIC PROJECTS UNDERTAKEN Duration Title Dissertation: "Synthesis and Characterization of Nickel based M.Tech. Catalysts for Hydrogenation of Furfural to Furfuryl Alcohol". The main focus is to enhance the activity and selectivity of the catalyst ... - 2015 Jan 02
... ACADEMIC PROJECTS UNDERTAKEN Duration Title Dissertation: "Synthesis and Characterization of Nickel based M.Tech. Catalysts for Hydrogenation of Furfural to Furfuryl Alcohol". The main focus is to enhance the activity and selectivity of the catalyst ... - 2015 Jan 02
Mtech fresher
New Delhi, DL, India
... Rajiv Srivastava Team Size-2 Compilation, RC synthesis, Place and route of a sample code Function Generator using Digital Inputs (May,11 – Apr,12) B-tech project Team Size-2 Awards and Achievements Performer in extracurricular activities at School ... - 2014 Dec 28
... Rajiv Srivastava Team Size-2 Compilation, RC synthesis, Place and route of a sample code Function Generator using Digital Inputs (May,11 – Apr,12) B-tech project Team Size-2 Awards and Achievements Performer in extracurricular activities at School ... - 2014 Dec 28
Mtech_VLSI_SRAM_Design_Verification
New Delhi, DL, India
... Synthesis Tools : Synopsys Design Compiler Pre-Layout Simulator : Cadence Virtuoso(Sch.), Cadence NCSIM Post Layout Simulator : Mentor Graphics Eldo STA : Synopsys Primetime Load Balancing Tool : LSF Tool Kits : Arduino (Atmega 328p), FPGA(Spartan ... - 2014 Dec 22
... Synthesis Tools : Synopsys Design Compiler Pre-Layout Simulator : Cadence Virtuoso(Sch.), Cadence NCSIM Post Layout Simulator : Mentor Graphics Eldo STA : Synopsys Primetime Load Balancing Tool : LSF Tool Kits : Arduino (Atmega 328p), FPGA(Spartan ... - 2014 Dec 22
Design Assistant
New Delhi, DL, India
... Domain: ASIC/FPGA Design Flow, Digital Design methodologies Knowledge: RTL Coding, FSM based design, Simulation, Code Coverage, Functional Coverage, Synthesis, Embedded systems. Professional Qualification: Master of Technology from Nizam Institute ... - 2014 Dec 17
... Domain: ASIC/FPGA Design Flow, Digital Design methodologies Knowledge: RTL Coding, FSM based design, Simulation, Code Coverage, Functional Coverage, Synthesis, Embedded systems. Professional Qualification: Master of Technology from Nizam Institute ... - 2014 Dec 17
Project High School
Greater Noida, UP, India
... Modelsim(verilog,VHDL) Precision synthesis Tool Linux Keil Knowledge of Microsoft office, power point, Microsoft Excel. TRAINING AND PROGRAMS 6 Week training in EMBEDDED SYSTEM at DUCAT. Attended workshop on MATLAB, VHDL and Embedded system . ... - 2014 Nov 16
... Modelsim(verilog,VHDL) Precision synthesis Tool Linux Keil Knowledge of Microsoft office, power point, Microsoft Excel. TRAINING AND PROGRAMS 6 Week training in EMBEDDED SYSTEM at DUCAT. Attended workshop on MATLAB, VHDL and Embedded system . ... - 2014 Nov 16