Engineer Design
DAVID JING
San Jose, CA, 95112
sw6ze7@r.postjobfree.com
Skills
RF/Communication Systems
• Board/system Level prototyping and trouble-shooting with lab equipment.
• Hands-on design of a LNA in Cadence with sub-180nm COMS technology.
• Hands-on design of a Passive delay equalizer (RF filter) in Hspice.
• Simulation of DTV and WCDMA receivers and a WCDMA transmitter in MATLAB.
• RF front-end and digital back-end of wireless transceivers.
• Digital/analog modulation/demodulation strategies, transmission-channel impairments and performance criteria.
• Various design in transistor level for power amplifier, mixer, oscillator and PLL-based synthesizer.
• Multi-rate digital signal processing such as up/down sampling and re-sampling.
• Wireless standards including 2G/3G digital cellular, WiMax, GSM, WCDMA, etc
Mixed-signal IC
• Voltage references and biasing, and elementary amplifier configurations.
• Hands-on design of a high-speed operational amplifier.
• knowledge of designing comparators, transconductors and compensation methods.
Digital hardware
• knowledge of state machine concepts, asynchronous design, bus interfacing and DSP architecture.
• Hands-on programming on various FPGA.
• Combination and sequential logic, digital systems design and design for verification.
Software
• C/C++ program in multimedia data compression, C/C++ socket program in TCP/IP and UDP.
• Cadence, Hspice, and MATLAB for schematics and simulation.
• Various operating systems such as Windows and Unix.
Education
Master Science in Electrical Engineering
University of Southern California ,
9/2009-12/2010
Los Angeles, CA, US
GPA 3.74/4.0
Relevant Coursework
• RF frequency and hardware
• RF frequency filter design
• Mixed signal integrated circuit design
• Communication System
• Network and communication
Bachelor of Applied Sciences in Electrical Engineering
Simon Fraser University,
9/2003-08/2007
Vancouver, Canada
GPA 3.66/4.0
Experience
Itron Incorporation (South Carolina, US)
Associate Hardware Design Engineer (4/2008-2/2009)
• Designed various switch power supplies/regulators (12V/3.3V).
• Trouble-shooting and failure analysis of digital/analog electronic circuitry.
• Worked with SW engineers on system integration.
• Reliability testing of new products and maintain engineering documentation.
Broadcom Corporation (Richmond, Canada)
Software Verification Engineer Intern (12/2005-8/2006)
• Testing in Perl for new versions of IP phones, cable modems and gateway.
• Set up automation test environments for software and hardware products
Projects
RF frequency and hardware
• Designed low noise amplifier (LNA) with sub-180nm COMS in Cadence, which provides a variable forward gain of 5 - 20dB for 1.5 GHz, 2 GHz and 3 GHz signals from a 2.5 V power supply.
Noise Figure is less than 7dB in all cases. The power consumption is about 90mW.
Communication Systems
• Built two digital receivers in MATLAB to process DTV and WCDMA signals.
• Built WCDMA transmitter in MATLAB, which generates single/multi codes of WCDMA signals.
RF frequency filter design
• Passive delay equalizer in Hspice. Zero Frequency Envelop Delay is 325 pSec with 2% tolerance. Driving Point Input Impedance is 50 Ohms. Magnitude Response Flat to 3 dB through at least 15 GHz.
Mixed-signal IC design
• Design a two stage low power operational Amplifier in Cadence. Voltage gain is 75 dB. Unity gain bandwidth is 100 MHz, slow rate is 50 V/us and output swing is 1.6 V.
Digital system design
• 16 X 16 bit multiplier in VHDL to implement an audio Graphic equalizer on Spartan II FPGA.
• Blackjack game in VHDL on the Altera EPF10KLC84-4 FPGA chip.
Network and communication
• Implemented a C++ program to simulate a race among 4 cellular units to find their way with the help of 2 base stations and reach a target before running out of battery or going out of range. All communications take place over TCP and UDP sockets in client-server architecture.
Contact this candidate