Quality Assurance Manager / Sr Process Engineer

ORION FARINA

Email: *****.******@*******.*** phone: 508-***-****

QUALIFICATIONS Professional Profile:

SUMMARY Passionate about quality and engineering with over 30 years of high volume and boutique process engineering and quality assurance manufacturing experience across industries including Semiconductor, Surface Mounted Technology, Laser, High Performance Coating Finishes (PVD, Electroplating and Spray on). A history of experience in Dielectrics (CVD, PECVD, HDP and Spin on), Metal Deposition (PECVD, PVD), Rapid Thermal Anneal, Diffusion (atmospheric and sub), Plasma Etch, Ultrasonic cleaning, CO2 and various Media Ablation techniques. Proven track record of innovative thought leadership and results in development work, continuous improvements and cost savings.

Key Competencies:

• Develop and implement effective lean strategies to address and resolve complex technical issues

associated with manufacturing, development, quality and functional area efficiency issues.

• Manage complex projects from inception to completion across an ISO9001, AS9100D, ITAR, ATF, FAA

and NADCAP regulated factories.

• Provide training, technical coaching and mentoring through all aspects of process development

defining functional roles, establishing clear objectives and evaluating performance.

• Attentive to detail through meticulous planning and organized execution of strategies.

• Prepare and manage operating budget, forecast cost factors and implement effective cost controls.

• Consistently implemented technical procedures and continuous improvement processes by

6 Sigma DMAIC methodologies resulting in reduced production costs, improved quality and profit.

EMPLOYMENT

2024 -2025 ES Components, Sterling, Ma

Sr Quality Control / Quality Assurance Engineering Manager

• Responsible for all Quality Control and Quality Assurance activities – (ISO 9001, AS9120, FAA, ITAR)

• Responsible for ensuring that the company’s products meet quality standards and regulations by

creating and enforcing the quality standards, procedures and policies for the company.

• Responsible for driving all CAPA’s and MRB activities – driving to root cause.

• Responsible for all clean room activities for inspections, dispositions and qualifications.

TANURY INDUSTRIES, Lincoln, RI

2019-2024 Quality Assurance and Engineering Manager - Reporting to Chief Executive Officer

• Responsible for all Quality Assurance and Engineering activities – (ISO 9001, AS9100, NADCAP,

ATF, FAA, ITAR)

• Responsible for ensuring that the company’s products meet quality standards and regulations by

creating and enforcing the quality standards, procedures and policies for the company.

• Analysis of engineering development work across multiple departments.

• Work closely with managers and executives across multiple departments.

• Responsible for review and quick resolution of quality control problems, inspection quality control

documents (SOP, OP and WI’s) forms and checklists and establish protocols and guidelines.

• Responsible for establishing quality standards, procedures and monitoring the work of others to ensure

those standards are met or exceeded.

• Responsible for all CAPA / Non-Conformance Activities (internal and external)

• Monitoring company quality operations and processes to ensure standards are met.

• Review, track and report on KPI’s to ensure alignment and compliance with company quality

expectations.

ORION FARINA

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VICOR CORPORATION, Andover, MA

2015-2018 Senior Process Engineer – Reporting to Director of Engineering

• Development Process Engineer for Plasma Etch, PVD Sputtering, CO2 and other various media ablation

applications, Ultrasonic wet chemistry all for high power converter modules. Dehydration bake process

for Legacy and Development lines.

• Sustainment Process Engineer for Plasma Etch on the Legacy product line. Implemented SPC and

PFMEA across all responsible areas. Improved cycle time by 50% on two separate

process platforms. Re-designed fixtures utilized to double throughput while decreasing cycle time by

50%.

• Responsible for development of plasma ash, ultrasonic clean, traditional/vacuum dehydration

operations for the manufacturing line. Responsible for all Lean, 6 Sigma transformation area activities,

including but not limited to value stream mapping, process activities including cycle time reduction,

defect reduction general process and future road map creation/deliverables and lean manufacturing

training.

1998-2015 INTEL CORPORATION, Hudson, MA, Phoenix AZ, Hillsboro, OR

2007-2015 Senior Process Engineer

Have performed in several capacities including engineering management during this period:

• Process Engineer for 24 non-copper and copper High Density Plasma SiO2 doped and

undoped tools. Responsible for sustaining the area and meeting all safety, quality and output

goals as well as providing continuous improvements for the 0.09µm product line.

• RTA Process Engineer responsible for development of GaN substrate inverter process.

• Technical project manager responsible for coordinating the development of a new Flip Chip process

across Fab17 development engineering. Directed 15 process engineers throughout project.

• Equipment Manager with 21 equipment technicians as direct reports. Operations Manager with 24

manufacturing technicians as direct reports. (Managerial Rotation Program 2008-2009). Responsible

for hiring, performance coaching, and reviews.

• Process Change Control Board member responsible for coaching, reviewing and approving

White Papers for the entire site. Personally authored over 50 engineering white papers.

• Process Engineer in the Novellus Thin Films area comprised of 18 Silicon Oxide and Silicon

Nitride Deposition tools and served as leader of the Front-End Defect Integration Team.

• Defined road maps to meet requirements, goals and milestones for new technology processes and

define and establish flow, procedures and equipment configuration for the module.

• Selected and developed material and equipment for the process to meet quality, reliability, cost, yield,

productivity and manufacturability requirements and drive improvement for each requirement.

• Established process control systems for the Thin Films module and sustained through volume ramp.

Accomplishments:

• Recipient of Intel Divisional award for engineering technical leadership and flawless execution for the

Flip Chip project. Project was completed with working prototype 3 months ahead of schedule.

• Saved Fab17 $257,000 in lost revenue after identifying and resolving that one of the largest single

Estimated Die Impact (EDI) failures from HDP were originating from the process chamber slit valves.

• Implemented Rev 1 of the Control of Hazardous Control Procedure specifications for the thin films area.

• Saved Fab17 $340,000 annually by instituting a test wafer monitor reuse plan for thin films area.

• Created an effective cross-training plan and certification goals for a wide range of technicians.

• Successfully managed a difficult area which had numerous performance and safety related issues.

ORION FARINA

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1998 -2007 Process Engineer - High Density Plasma Thin Films

• Responsible for over a dozen multi-chambered High Density Plasma dielectric systems including

continuous improvement and sustainment working directly with all 4 shifts for 24x7 operations.

• Utilized Statistical Process Control (SPC++) daily to ensure optimal processing conditions.

Accomplishments:

• Authored the primary qualification white paper and was directly involved with ramp and certifica-

tion activities of all new HDP systems at Fab17 and authored over 30 engineering white papers

for Fab17 and sister Fabs in the Virtual Factory (Oregon, Arizona and Ireland).

• Saved $200,000 annually as a key contributor in the manufacturing excellence program initiating

numerous virtual factory wide improvements.

• Created the level 2 process engineering technical training package and wrote the certification

“lite” package and accelerated the ability of operation technicians to become certified.

• Increased 5.5% tool availability achieved - Initiated and drove the idea and cultural change to load level

ing all preventative maintenance activities in the Virtual Factory thin films area.

• Led the Fab17 thin films defect reduction team which became the first team to pass all defect

goals for the first half of 2005 and reducing defect notifications by 10%.

• Coached, fully trained and mentored 5 process technicians to understand/sustain the thin films area.

EDUCATION UNIVERSITY OF COLORADO, Boulder, CO

Aerospace Engineering Program

Professional Training & Development:

• Lean Six Sigma Training • Advanced Electrical Safety

• SPC++ for Engineers • Hazardous Waste Handling & Storage

• Advanced Design of Experiments • Excel, Word, PowerPoint, Project

• Engineering Analysis Survival • Advanced Technical Writing for Authors

• Structured Problem Solving • Front and Back End Integration

• Advanced JMP for Engineers • Control of Hazardous Energies (CoHE)

• Process Control Systems (PCS) • Ionizing Radiation Safety

• SEM, TEM, FIB, FTIR, RBS and XTRF • SAP, Minitab, JMP, TRIZ,

• Excursion Training for Engineers • CPR & First Aid Recertification

• Electrical & Electronic Connections • Protecting Classified Information

PUBLICATIONS / OTHER

Developed RTA process for inductors based on GaN Substrate. Working with GaN posed numerous technical challenges which had never been accomplished on 200mm GaN wafers.

Recognized by Intel DTO Division for technical achievement in for developing "cold" HDP oxide deposition process used in the creation of a television picture on a chip project for flat panel televisions.

Won Best Paper Award at the Advanced Semiconductor Manufacturing Conference (ASMC)

for the co-authored and published paper “Manufacturing Advancements in an organic Spin on Glass

(SOG) process by Ar+ Implantation”

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