Resume

William A. Suba US Citizen acw3b0@r.postjobfree.com

SUMMARY: HW/SW, Systems, Military, Electrical/Electronic, Test/Design Engineer with 40+ yrs. experience in design, testing, and troubleshooting highly complex Multi-Layer PCB, VHF XCVR, MR MGV Suspension, Micro-Controllers, computers, Cisco CO OC-192, communications, DC/DC Converters, Switch Mode Power Supplies, Inverters, Linear Actuators, Stepper & BLDC motor drives and robotics. HARDWARE: Data General Eclipse S100, DEC PDP8 and LSI-11, Intel 8051 up to 8186, Motorola 68B09, 68K, 68302, 80360, TI TMS320, DSP 56001, Spectrum Analyzer, Logic Analyzer, In-circuit Emulator ICE, HALT/HASS Chambers, ESS, Vibration Table, and IXIA Optical Traffic Generator.

SOFTWARE: WIN 7 & 10, Micro-code, machine language, assembly, RSX-11, DOS, SCSI, RTOS, PSOS, VXWORKS, BASIC, Visual BASIC, C, C++, ORCAD Schematic Capture, AUTOCAD, Catia, XTALK, UNIX, Solaris, Linux, Windows, CITRIX, ORACLE, DOORS, ACE, XML, HTML, Vision Probe, Vision Click, Innoveda/MentorGraphics/DXDesigner, Cadence Allegro Schematic Capture, EVMS . Communications Standards: IEEE-488 (GPIB), RS-232C, RS-485, 10/100 Ethernet, T1, E1, J1, T3, OC3, OC12, OC48, OC192, CDMA, TDMA, FDMA, WAN, MAN, LAN 802.3 802.1D 802.1Q, CAN-BUS, JTAG, SPI-Bus, CCENT, CCNA and VHF XCVR. MIL-STD: 1275D, 704F, 810F, 1553, 461, 464, and MIL-PRF-6083F, 46170D, DO-160, DO-178B, DO-254, RoHS, IPC-610. Work Experience:

Ametek Prestolite Power, Troy OH, 2016 to present, (contracting) Senior Electrical Engineer Redesign of Battery Monitor test system. Procure HALT/HASS temp & vibe vendors, AutoCAD, test procedure and potting process. BAE Systems Land & Armaments, 2012 to 2014 (contracting) Senior Electrical Engineer (Military) M109A7, 155MM Self Propelled Howitzer, electrical system design, cable harness design. Troubleshoot electrical failures: Electronic Speedometer, HV power distribution, Cable management System. Design Integration of Electro-Hydraulic Linear Actuator with BLDC motor for power doors. MIL-STD: 1275D, 704F, 810F, 1553, 461, 464, 46170D, and DO-178B, DO-254, DOORS and Systems requirements. Worst Case Analysis, EMI/EMC, FRACAS to the Route Mean Cause on Tiger Team, and received Award. L3 Communications Inc., 20011 to 2012 (contracting) Senior Electrical Engineer (Military) Russian Kilo Submarine, classified systems design periscope assembly. Innoveda/MentorGraphics/DXDesigner, AutoCAD, VISIO, MIL-STD: 1275D, 704F, 810F, 1553, 461, 464, 46170D, and DO-178B, DO-254, DOORS and Systems requirements. Worst Case Analysis of EMI/EMC. Breeze-Eastern, 2009 to 2010 (contracting) Senior Electrical Engineer (Military) Hardware/software, systems design specification flowcharts and block diagrams. Specify BLDC motor system solutions. Qualify BLDC motor OEM. Source selection of BLDC vendors for design and production capability. Specify micro-processor based controls for robotics. Evaluate Space Vector Modulated (SVM) Flux Weakened HV BLDC motors, drives, brakes and resolver assemblies for Crane Hoist and Recovery Winch for Future Combat Systems FCS BAE, and Cargo & Recovery Winches for AirBus. Worked with Level of Repair Analysis, Worst Case Analysis, Conducted radiated emissions testing at EMI/EMC test facility, spectrum analyzer with antenna set. NeodymiumIronBoron

(NdFeB) and SamariumCobalt (SmCo) magnetics. Planar XFMR,. MIL-STD: 1275B, 704F, 810F, 1553, 461, 464, 46170D, and DO-178B, DO-254, DOORS, CDR/PDR and Systems req’s.

Cummins Power Generation, 2008 to 2009 (contracting) Senior Systems Test Engineer Test evaluation, performance & efficiency of High Efficient Quiet Diesel 18kw AC Generator/Inverter system for RV. Update test procedures, document system configuration and S/W issues. Update Database and S/W requirements. Analyzed Inverter efficiency @88% EFF. Documented test system wiring in VISIO.

General Dynamics Land Systems GDLS (Military), 2005 to 2008(Contracting). Lead Hardware Engineer, Hardware Engineering Manager, Systems Engineer, Senior Analog Power Engineer. MGV on-board certified. Research and Diagnose Hardware failures on Military Armored Personnel Carriers. C130 Interface, Future Combat Systems FCS- Design and develop test system for Tracked vehicle suspension and Road Simulator Test Lab. Design suspension controls for Magneto- Rheological semi-active suspension system. Experience with F.O.G. & Spinning Mass Gyros, FLIR, Accelerometers, CAN-Bus, DOORS, ITAR, 28v BLDC SMC/SMD Innoveda/MentorGraphics DXDesigner and Cadence Allegro Schematic Capture, ACE, MIL-STD’s, EVMS and Hydraulics. Managed 6 Hardware engineers on many hardware projects. Worked with FRACAS Failure Reporting, Analysis and Corrective Action report, to the Route Mean Cause. Updated and corrected System Requirements, Analyzed, redesigned, troubleshot, as a Senior Analog High Power Engineer on FCS 15KW Isolated HV to LV 610VDC/28vDC Power Supply with Buck-Boost, Full Bridge rectification, Planar XFMR, input over current protected, output short circuit protected, input over/under voltage and transient protected, output under/over voltage protected, 8-point thermally protected, <1% closed-loop feed-back stabilized regulation from 1/2w to 15kw switching up to 75% loads, running

@94% Efficiency, I-Limited, BIT, Silicon/Carbide Schottky High-Speed rectifiers, gate drives, faraday-caged, EMI/EMC magnetics, magnetic PI-input PS-filter design, IGBT & Power MOSFET, opto-coupled linear components, active capacitor discharge on power down. FPGA design interfacing and testing. MIL-STD: 1275B, 704F, 810F, 1553, 461, 464, 46170D, and DO-160, DO-178B, DO-254. DOORS and Systems requirements. Worst Case Analysis EMI/EMC. Designed 3 multi-layered PCB’s 4 to 9-layers, ARM RISC processor controlled input card, SPI bus, motherboard and intelligent Power controller. Repackaged into a shoe box size module. Delivered to GDLS headquarters in Detroit, and received complimentary Email from GDLS VP. Evaluated new HV lab at Shelby, MI. I was told “I improved the reputation of the Tallahassee facility to Sterling heights” (headquarters). Received complimentary email from VP. Sensor Systems LLC. 2005-2005 Principle Engineer- Programming test systems for a variety of Military MK46 Torpedo/Missiles/Aircraft Sensors and Encoders for Nuclear Reactor. Diagnose product failures. Build test systems, test tools. Purchase test equipment. Troubleshoot digital test systems. Networked, automated, updated and backup 25 Test PCs. Basic and LabView programming. IEEE 488 (GPIB), RS-232C, and Ethernet experience. Program and maintain Precision computer-controlled Welding systems. Support IC chip pick-place die-bonder. Built computer controlled, mechanical encoder test system including real-time logic analyzer. Microscope analysis and repair of encoder dies. Cisco Systems Inc. 1996 to 2004 Senior Systems Test Engineer Five-S, and Six-Sigma ISO-9000 environment, MOR reports. Design hardware & software, document hardware and mechanicals, program script files using XTALK, C, C++, and Unix, IXIA, BIT, troubleshooting hardware problems, purchase components and test equipment, qualify sheet metal, PCB, cable and assembly vendors. Maintain 2 vendor sites on test Automation equipment and PCB troubleshooting support. Maintain Calibration database for in-house and vendor sites. Experience on Video On Demand, WAN, MAN, LAN, CAN, SONET, IEEE 488 (GPIB), RS-232C, T1, E1, J1, T3, OC3, OC12, OC48, OC192, CDMA, TDMA and Ethernet. IPC610 fine-pitch microscope soldering. Design verification and regression testing, FRACAS to the Route Mean Cause. EMC2 Corp. 1995 to 1996 (Contracting) Senior Systems Debug Specialist Troubleshoot 68K based digital, Terabyte, Cached, SCSI RAID (Random Access Inexpensive Disk Array) system, from HALT/HASS Highly Accelerated Stress Screening environmental chambers, ISO-9000, using the HP1660 and 16500 logic analyzer/digital scope, Probe software, machine code, pal equations, Field Programmable Gate Arrays, to the component level, FRACAS to the Route Mean Cause. Update engineering with PCB, component, and software issues. Document all transactions in MRP Material Resources Program. Successfully fixed and documented over 1,000 boards valued at $4,000/each. Excel Inc. 1994-1995 Computer Communications Debug Specialist. IEEE 488 (GPIB), RS-232C, and Ethernet, VXWORKS. Troubleshoot Multiprocessor based digital, FRACAS to the Route Mean Cause, Surface Mount Technology, high density, components on both sides, computer communication boards, to the component level, Completed 6 month contract repairing over 500 boards valued between $1,000-

$8,000/ea with minimal training or assistance. Documented failures, updated engineering for product improvements. Experience on Probe Software, Ethernet RTOS, LAN, WAN, VME bus, 68302, PSOS, DSP, ISDN, T1, E1, J1, CDMA, TDMA, and digital scope. Advanced Control Systems Corp. 1983 to 1994 Design Engineer/ Production Manager/Sales & Service Engineer Design, build, test, document, and program microprocessor based digital and power, stepping motor controller, Linear & Switching Power Supply Design, remote audio & RS485 control, VHF RTU, Relay Controls, Substation Amps, KV, High Voltage, KWH, PFC Power Factor Correction, Protection, Load Management, Short-Circuit Protection and Analysis, Transformers, Transorbs, and SCADA controls. Used Intel 8051 machine language, assembly language, and basic programming. Design, build, and program test equipment. IEEE 488 (GPIB), RS-232C, and RS-485. VHF RF radio system designs, installation, troubleshooting in the field, FRACAS to the Route Mean Cause. Intersystem failures fixed. Cable harness design and pneumatics. Telephone, customer site, in-house, and Trade Show Sales & Marketing. Production Manager. Managed up to 10 assemblers and technician. Responsible for all purchasing of computer products to resistors, schedules, cost reduction, expediting, supplier selection and qualifying, and multiple sources. Shipping, receiving, applications, test, assembly, repairs, sales, customer service, tech. support, trade shows, field service, training, and design analysis. Designed and built a “Jet-Engine Test Stand for Pratt & Whitney”. Designed and built a “Torque Test Stand” with Magnetic Brakes. Emulogic Inc. 1979 to 1983(Contracting) Systems Test Engineer Build, test, modify, FRACAS to the Route Mean Cause, document, and program microprocessor based digital Emulator development system, thru DEC LSI-11 computer, running RSX Ethernet LAN on 68000, 6809, 80186, 8085, 8086, 8048, 8031, Z80, Z8001, NSC-800, and Piezo. Datamedex Inc. Systems Test Analyst. Troubleshoot Medical Microprocessor based digital & analog Heart Monitor to the component level. Evaluate and analyze product design. Guide new products thru production. Datagrafix Inc. Senior Field Service Engineer. Perform preventive and corrective maintenance on a variety of Micro-Fiche business machines at major banks and ins. Comp. thru-out Boston 24/7. Raytheon Data Systems. Hardware Instructor. Developed training courses for assembly and inspection. Instructed classes on assembly, inspection, 68000 LAN introduction and field troubleshooting for field service engineers. Sigma Instruments Inc./ Fisher Pierce 1976 to 1979 Field Sales & Service Engineer Install and troubleshoot VHF, radio-controlled, microprocessor based digital, SCADA Utility equipment, to the component level, in the field, and all over the U.S. Assist sales with customer requirement. Prepare for and support UL Testing @UL Long Island, NY. Engineering Technician. Build, tested, NIST traced TE, and troubleshoot prototype electronics, lightning protection, FRACAS to the Route Mean Cause. Assist design Engineer with new and old circuit design problems. Increased XMT power by 40% and increased receiver sensitivity by 50%. Designed and built a Deviation Level meter and an audio XCVR with switch inputs and LED outputs. Lead Technician- Troubleshoot analog, digital, RF, and computer electronics. Aligned custom VHF transmitters and receivers from production to customer site. Provide supervision and instruction to production test technicians. Design and build test equipment.

Data General Corp. 1975 to 1976 Computer Debug Technician Troubleshoot FRACAS to the Route Mean Cause, digital discreet CPU LSI to the component level, In System, Discreet CPU, with 2901 Bit- Slice ALU, Error Checking and Correction, Floating Point, 128K Core Memory, I/O, and power supply boards, for the Eclipse S-100 computer, selling for $250K+. DG programming 56-bit Microcode, Majic Probe, 1st LAN system. IEEE 488 (GPIB), RS-232C, and Ethernet. Eclipse S100 was in the Museum of Science in Boston, and a book was written about the history. Education: Southeastern Regional Vocational Technical School, Sylvania Technical School, VHF Radio Communications, MS-Word, Excel, Power Point, Access and project, VISIO, 2000 B.S. Information Technology New Hampshire College, 2015 Cisco CCENT certification, 2016 CCNA certification, 2016 CCNA Security certification, 2016 CCNA Wireless certification and 2016 CCNA Voice certification.