| Resume alert | Resumes 71 - 80 of 226 |
Information Design
New Delhi, DL, India
... Module Maximum Marks (Theory) Obtained Marks 1 ADD 40 25 2 System Architecture 40 18 3 CMOS VLSI Design 40 21 4 VHDL 40 26 5 Verilog 40 29 6 Linux Shell Scripting 40 22 Total 240 141 Academic Details Level Stream Institute Board/University Passing ... - 2015 Oct 07
... Module Maximum Marks (Theory) Obtained Marks 1 ADD 40 25 2 System Architecture 40 18 3 CMOS VLSI Design 40 21 4 VHDL 40 26 5 Verilog 40 29 6 Linux Shell Scripting 40 22 Total 240 141 Academic Details Level Stream Institute Board/University Passing ... - 2015 Oct 07
Project Training
Noida, UP, India
... Project:- Atm machine using VHDL elevator, TLC4way,TLC 1 way, stack, vending machine,sequence detector using VERILOG and FIFO using VERILOG. Head of discipline committee in college Captain of school Basket Ball team Gold medal in inter college ... - 2015 Oct 06
... Project:- Atm machine using VHDL elevator, TLC4way,TLC 1 way, stack, vending machine,sequence detector using VERILOG and FIFO using VERILOG. Head of discipline committee in college Captain of school Basket Ball team Gold medal in inter college ... - 2015 Oct 06
Project Engineer
New Delhi, DL, India
... TECHNICAL SKILLS Operating Systems: Windows, Mac Programming Languages: C, C++,VHDL,Verilog .Virtuoso. Software: XILINX, T SPICE,H SPICE,P SPICE.,CADENCE,Virtuoso,Assura,Spectre,S-EDIT, SILVACO,METORGRAPHICS,MODELSIM, MS Office, Adobe Photoshop, ... - 2015 Sep 30
... TECHNICAL SKILLS Operating Systems: Windows, Mac Programming Languages: C, C++,VHDL,Verilog .Virtuoso. Software: XILINX, T SPICE,H SPICE,P SPICE.,CADENCE,Virtuoso,Assura,Spectre,S-EDIT, SILVACO,METORGRAPHICS,MODELSIM, MS Office, Adobe Photoshop, ... - 2015 Sep 30
Design Engineer Engineering
Greater Noida, UP, India
... school UPBoard PCMB, Hindi English 2005 70.5% TECHNICAL SKILLS HDls : VHDL, Verilog Simulation Tools : Mentor Graphics ModelSim SE6.1a, Questasim Circuit Simulator : Virtuoso (Cadence) Synthesizer Tools : Leonardo Spectrum FPGA Tool : Xilinx ISE 10 ... - 2015 Sep 28
... school UPBoard PCMB, Hindi English 2005 70.5% TECHNICAL SKILLS HDls : VHDL, Verilog Simulation Tools : Mentor Graphics ModelSim SE6.1a, Questasim Circuit Simulator : Virtuoso (Cadence) Synthesizer Tools : Leonardo Spectrum FPGA Tool : Xilinx ISE 10 ... - 2015 Sep 28
M.TECH VLSI., Trained I.O.T system
New Delhi, DL, India
... Tanner, Pyxis(MENTOR GRAPHICS ), Virtuoso(CADENCE), DRC/LVS(Assura) • Experience in Cadence layout platform: Layout XL • Other Skills: Analog IC Design, Digital Integrated circuits, Mixed Signal Processing, CMOS Technology, IC Fabrication, C, VHDL. ... - 2015 Sep 28
... Tanner, Pyxis(MENTOR GRAPHICS ), Virtuoso(CADENCE), DRC/LVS(Assura) • Experience in Cadence layout platform: Layout XL • Other Skills: Analog IC Design, Digital Integrated circuits, Mixed Signal Processing, CMOS Technology, IC Fabrication, C, VHDL. ... - 2015 Sep 28
Project Training
New Delhi, DL, India
... RBSE 63.44 2008 Technical Skills: Embedded:- Software Keil, MP lab,AVR studio,Arduino,ISIS Proteus, Xilinx Hardware PCB designing (Bread Board),FPGA,AT89C51,AT MEGA 8/16/32,PIC 16F72/877/874 Software: Assembly language, C language, Matlab, VHDL. ... - 2015 Sep 27
... RBSE 63.44 2008 Technical Skills: Embedded:- Software Keil, MP lab,AVR studio,Arduino,ISIS Proteus, Xilinx Hardware PCB designing (Bread Board),FPGA,AT89C51,AT MEGA 8/16/32,PIC 16F72/877/874 Software: Assembly language, C language, Matlab, VHDL. ... - 2015 Sep 27
Project Training
New Delhi, DL, India
... Ltd, jaipur, training given about VHDL language, Layout Design. Jun-Jul, 2012:– Summer training in Nettech Pvt. Ltd in LNMIIT,Jaipur, training given about network management, Basics commands of Linux, Concepts of operating system, Ethical hacking . ... - 2015 Aug 29
... Ltd, jaipur, training given about VHDL language, Layout Design. Jun-Jul, 2012:– Summer training in Nettech Pvt. Ltd in LNMIIT,Jaipur, training given about network management, Basics commands of Linux, Concepts of operating system, Ethical hacking . ... - 2015 Aug 29
Pvt Ltd Part Time
New Delhi, DL, India
... ACADEMIC DETAILS: TECHNICAL SKILLS: MS Office -2010 Networking : CCNA Programming Languages : C, C++ Embedded System, VHDL, Embedded C Operating System : Windows 7, Windows XP, Linux (Centos 6.5) Software : OrCAD Capture CIS 10.5 ACADEMIC INTERESTS: ... - 2015 Aug 12
... ACADEMIC DETAILS: TECHNICAL SKILLS: MS Office -2010 Networking : CCNA Programming Languages : C, C++ Embedded System, VHDL, Embedded C Operating System : Windows 7, Windows XP, Linux (Centos 6.5) Software : OrCAD Capture CIS 10.5 ACADEMIC INTERESTS: ... - 2015 Aug 12
Assistant Microsoft Office
Gurgaon, HR, India
... LANGUAGES & APPLICATIONS: Basics of C, VHDL, Verilog, TCL scripting (Basics for cadence), Microsoft Office Tools. ACADEMIC DETAILS NATIONAL INSTITUTE OF ELECTRONICS AND INFORMATION TECHNOLOGY CALICUT (KERALA) August 2014 - Feb 2015 PG Diploma in ... - 2015 Aug 06
... LANGUAGES & APPLICATIONS: Basics of C, VHDL, Verilog, TCL scripting (Basics for cadence), Microsoft Office Tools. ACADEMIC DETAILS NATIONAL INSTITUTE OF ELECTRONICS AND INFORMATION TECHNOLOGY CALICUT (KERALA) August 2014 - Feb 2015 PG Diploma in ... - 2015 Aug 06
Project Design
Noida, UP, India
... SYNOPSIS A VLSI professional with 1 year of experience in design and verification in tevatron technologies Previous 6 months of experience in Networking and security SKILLS Command in verilog/VHDL,system verilog,RTL coding,CMOS,FPGA,ASIC design, ... - 2015 Aug 06
... SYNOPSIS A VLSI professional with 1 year of experience in design and verification in tevatron technologies Previous 6 months of experience in Networking and security SKILLS Command in verilog/VHDL,system verilog,RTL coding,CMOS,FPGA,ASIC design, ... - 2015 Aug 06