Design Engineer Engineering

*

POORNIMA SHARMA

Phone : 945-***-****, 945-***-****

E-mail : ********.*********@*****.***

Date of Birth : April 10, 1991

Branch : M.Tech (VLSI Design)

CAREER OBJECTIVE

To develop my technical skills and knowledge about latest processes to fulfill my needs & aspirations along with the organization’s with complete sincerity. ACADEMIC PROFILE

Degree/

Certificate

Board & College

Main

subjects

Year of

Passing

Percentage

M.TECH

Banasthali University

Rajasthan

VLSI

Design 2015 79.6%

B.TECH.

SIT, Farah, Mathura

(UPTU)

ECE 2012 72.02%

12th

Agrasen Inter College

Sikandrabad,

UPBoard

PCM

Hindi

English

2007 71.4%

10th

Agrasen Balika Higher sec.

school

UPBoard

PCMB,

Hindi

English

2005 70.5%

TECHNICAL SKILLS

HDls : VHDL, Verilog

Simulation Tools : Mentor Graphics ModelSim SE6.1a, Questasim Circuit Simulator : Virtuoso (Cadence)

Synthesizer Tools : Leonardo Spectrum

FPGA Tool : Xilinx ISE 10.1

AREA OF INTEREST

Digital Electronics

Digital CMOS IC design

TRAINING ATTENDED

10 months Internship as an intern design engineer at “Silicon mentor” Greater Noida from July, 2014 to April, 2015.

2

Industrial Training in “MaxDNA control system” at NTPC. DADRI from June 1, 2011 to June30, 2011.

PUBLICATIONS

Published paper on “A Review of BJT Based Phototransistor” in International Journal of Engineering Research & Technology (IJERT) volume 3, issue 4, pp.306-310, April- 2014.

Published paper on “A Review on an Efficient Implementation of H.264 Video Encoder DCT Transform and Quantization” in Journal of Basic Applied and Engineering Research volume 2, number 5, pp. 386-389, January-march 2015. PROJECTS

implementation of SVM classifier using Verilog and MATLAB..

FPGA implementation of low power and area CSLA.

FPGA implementation of Adaptive Median Filter for Image Denoising.

FPGA implementation of Edge detection using Sobel Operator.

Verilog implementation of Quantization algorithm for multi-standard video codecs

(M.Tech final year).

FPGA implementation of MANET’s security Algorithm (M.Tech previous year).

Advanced Surveillance using 1st Degree Transformer Robot (B.Tech).

.

EXTRA-CURRICULAR ACTIVITIES

Participation in cultural activities at school level.

Actively participated in drawing competition at city level and got first prize.

Efficiently organized school annual day functions and other technical events. PERSONAL DETAILS

Date of Birth : 10th April 1991

Permanent Address : Street No.3, Heera Colony, Sikandrabad, Distt-Bulandshahar, UP Languages Known : English, Hindi

Father Name : Ramdutt Sharma

Hobbies : sketching, and cooking

PLACE: - Sikandrabad NAME: Poornima Sharma

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