| Resume alert | Resumes 31 - 40 of 162 |
Engineer Software
Plano, TX
... Mahereen Sultana Tazree Plano, TX, USA 512-***-**** (cell) ac8l98@r.postjobfree.com Programming Language Java, OOP in C#, C/C++, Python, Unix Shell scripts like bash, Assembly, Language, Verilog, HSPICE Database Software Tools SQL, Oracle Software ... - 2019 Feb 26
... Mahereen Sultana Tazree Plano, TX, USA 512-***-**** (cell) ac8l98@r.postjobfree.com Programming Language Java, OOP in C#, C/C++, Python, Unix Shell scripts like bash, Assembly, Language, Verilog, HSPICE Database Software Tools SQL, Oracle Software ... - 2019 Feb 26
Python, C, Matlab, AMPL, Multisim, Jupyter, Github, Kaggle,Java,Visual
Dallas, TX
... to divide data samples Skills Programming Languages/Tools: Python, C, Matlab, AMPL, Multisim, Jupyter, Github, Kaggle,Java,Visual Basic,Verilog,Quartus. Speaking Languages: Fluent in English and Mandarin (able to read traditional characters). - 2019 Feb 12
... to divide data samples Skills Programming Languages/Tools: Python, C, Matlab, AMPL, Multisim, Jupyter, Github, Kaggle,Java,Visual Basic,Verilog,Quartus. Speaking Languages: Fluent in English and Mandarin (able to read traditional characters). - 2019 Feb 12
Engineer Electrical
Dallas, TX
... Electrical Engineering GPA: 3.70 University of Mumbai, Mumbai, India Graduation Date: May 2014 Master of Sciences Electrical Engineering GPA: 3.05 Technical Skills: Programming Languages: C/C++, Java, Python, MATLAB, Verilog HDL and Assembly. ... - 2019 Feb 06
... Electrical Engineering GPA: 3.70 University of Mumbai, Mumbai, India Graduation Date: May 2014 Master of Sciences Electrical Engineering GPA: 3.05 Technical Skills: Programming Languages: C/C++, Java, Python, MATLAB, Verilog HDL and Assembly. ... - 2019 Feb 06
Fresh Graduate/Entry Level Software Developer
Dallas, TX
... metadata SFTPs to web service which renders a model in Blender to display on web Arithmetic Logic Unit (Digital Logic) Verilog Lead team by delegating roles and assignments Implemented an ALU using Verilog with functions for addition, subtraction ... - 2018 Nov 01
... metadata SFTPs to web service which renders a model in Blender to display on web Arithmetic Logic Unit (Digital Logic) Verilog Lead team by delegating roles and assignments Implemented an ALU using Verilog with functions for addition, subtraction ... - 2018 Nov 01
Engineer Electrical
Arlington, TX
... Panelview Drivers/ Protocols Ethernet/IP, TCP/IP, VOIP, DF-1, DH+, FPGA, CAN, LIN, I2C, SPI, UART Languages MATLAB- Simulink, Verilog, C, C++, Embedded C,GIT MS Office MS Word, MS PowerPoint, MS Excel, MS Access, MS Project Operating System Windows, ... - 2018 Oct 06
... Panelview Drivers/ Protocols Ethernet/IP, TCP/IP, VOIP, DF-1, DH+, FPGA, CAN, LIN, I2C, SPI, UART Languages MATLAB- Simulink, Verilog, C, C++, Embedded C,GIT MS Office MS Word, MS PowerPoint, MS Excel, MS Access, MS Project Operating System Windows, ... - 2018 Oct 06
Electrical Engineer Software
Arlington, TX
... Embedded C,FPGA designing SAP-ABAP Assembly Language HTML, CSS, XML Python,PCB designing ( Eagle CAD) MAC, TCP/IP VHDL,Verilog MATLAB,Simulink SAP R/3, Charm Solution manager 7.1 Wireshark, CCS Studio, Eclipse, SolidworksEthernet MS Visual Studio ... - 2018 Aug 24
... Embedded C,FPGA designing SAP-ABAP Assembly Language HTML, CSS, XML Python,PCB designing ( Eagle CAD) MAC, TCP/IP VHDL,Verilog MATLAB,Simulink SAP R/3, Charm Solution manager 7.1 Wireshark, CCS Studio, Eclipse, SolidworksEthernet MS Visual Studio ... - 2018 Aug 24
Engineer Electrical
Sachse, TX, 75048
... 00/98, MS-DOS, Linux, Mac OSX Languages: C, C++, java, Verilog, Assembly Language, NI Lab VIEW, Oracle SQL developer Radio Network Planning & Design Tools: Atoll, MapInfo, MS Excel, MS Outlook, MS Access, Google Earth, eDat, Actix, TEMS, NEMO...etc. ... - 2018 Aug 18
... 00/98, MS-DOS, Linux, Mac OSX Languages: C, C++, java, Verilog, Assembly Language, NI Lab VIEW, Oracle SQL developer Radio Network Planning & Design Tools: Atoll, MapInfo, MS Excel, MS Outlook, MS Access, Google Earth, eDat, Actix, TEMS, NEMO...etc. ... - 2018 Aug 18
Microsoft Office Computer Science
Frisco, TX
... Programming Languages: C, C++, Basics of JAVA, HTML, CSS Simulation Software: MATLAB, TINA, KEIL, MASM Hardware Design: VERILOG, CADENCE, VHDL EDUCATION: Pursuing Master of Science in Computer Science, Expected Graduation - December 2019 Texas A&M ... - 2018 Aug 07
... Programming Languages: C, C++, Basics of JAVA, HTML, CSS Simulation Software: MATLAB, TINA, KEIL, MASM Hardware Design: VERILOG, CADENCE, VHDL EDUCATION: Pursuing Master of Science in Computer Science, Expected Graduation - December 2019 Texas A&M ... - 2018 Aug 07
Electrical Engineering Assistant
Dallas, TX
... of Technology in Electronics and Communication Engineering June 2011 – May 2015 Jawaharlal Nehru Technological University, India GPA – 3.8/4.0 TECHNICAL SKILLS Languages (including HDL’s): C, Verilog, VHDL, MATLAB, System Verilog, C++, Python. ... - 2018 Jul 30
... of Technology in Electronics and Communication Engineering June 2011 – May 2015 Jawaharlal Nehru Technological University, India GPA – 3.8/4.0 TECHNICAL SKILLS Languages (including HDL’s): C, Verilog, VHDL, MATLAB, System Verilog, C++, Python. ... - 2018 Jul 30
Embedded Engineer
Grand Prairie, TX
... Design and Implementation TECHNICAL SKILLS Programming Skills: C, Embedded C, ASM(EASy68K) Language, MATLAB, Python, VHDL, Verilog, C++, HTML Hardware Platform: PIC, Arm, Arduino IDE (ATmega8), Pynq (Zynq XC7Z020), Cisco Packet Tracer OS used: ... - 2018 Jul 01
... Design and Implementation TECHNICAL SKILLS Programming Skills: C, Embedded C, ASM(EASy68K) Language, MATLAB, Python, VHDL, Verilog, C++, HTML Hardware Platform: PIC, Arm, Arduino IDE (ATmega8), Pynq (Zynq XC7Z020), Cisco Packet Tracer OS used: ... - 2018 Jul 01