| Resume alert | Resumes 41 - 50 of 197 |
Engineering Engineer
Chennai, Tamil Nadu, India
... Vidya Peetham Amrita School of Engineering, Coimbatore 6.98 CGPA GATE SCORE : GATE SCORE 317 YEAR OF GATE QUALIFICATION 2012 COMPUTER KNOWLEDGE : M S office, XP Basic knowledge in C MATLAB 7.12.0 R2011a Orcad ETAP Basic knowledge in Verilog design. ... - 2020 Dec 06
... Vidya Peetham Amrita School of Engineering, Coimbatore 6.98 CGPA GATE SCORE : GATE SCORE 317 YEAR OF GATE QUALIFICATION 2012 COMPUTER KNOWLEDGE : M S office, XP Basic knowledge in C MATLAB 7.12.0 R2011a Orcad ETAP Basic knowledge in Verilog design. ... - 2020 Dec 06
Electronics Engineer
Chennai, Tamil Nadu, India
... Software Skills MatLab, Verilog, C and C++ Project Details M.E. Project Developed a project on “Adaptive control of dissolved oxygen concentration for Activated Sludge process”. In order to protect the environment from the municipal waste, water ... - 2020 Nov 11
... Software Skills MatLab, Verilog, C and C++ Project Details M.E. Project Developed a project on “Adaptive control of dissolved oxygen concentration for Activated Sludge process”. In order to protect the environment from the municipal waste, water ... - 2020 Nov 11
Engineering Plant
Chennai, Tamil Nadu, India
... Parameterization in Verilog Coding. Interpersonal Skills Adaptable to Different Environment. Smart worker. Creative Thinking. Personal Information Father’s Name : Mr.A.Suresh Name : S.Thulasi Brindha Date of Birth : 16.04.1996 Marital Status : ... - 2020 Nov 06
... Parameterization in Verilog Coding. Interpersonal Skills Adaptable to Different Environment. Smart worker. Creative Thinking. Personal Information Father’s Name : Mr.A.Suresh Name : S.Thulasi Brindha Date of Birth : 16.04.1996 Marital Status : ... - 2020 Nov 06
Engineering Python
Chennai, Tamil Nadu, India
... SKILLS SUMMARY Digital Electronics VLSI design {Verilog code} C program C++ program Python- Pycharm ACADEMIC HISTORY P.A.College of Engineering and Technology – Anna University Chennai. Electronics & Communication Engineering CGPA = 7.47 year { 2016 ... - 2020 Nov 02
... SKILLS SUMMARY Digital Electronics VLSI design {Verilog code} C program C++ program Python- Pycharm ACADEMIC HISTORY P.A.College of Engineering and Technology – Anna University Chennai. Electronics & Communication Engineering CGPA = 7.47 year { 2016 ... - 2020 Nov 02
HR,Induction& training,Employee relations
Chennai, Tamil Nadu, India
... Through Innovations” Volunteer in KEMT Member of National Social Service at Karunya University Attended Add on course on verilog system design at Karunya University Attended workshop on lab view design at Karunya University Participated workshop on ... - 2020 Nov 02
... Through Innovations” Volunteer in KEMT Member of National Social Service at Karunya University Attended Add on course on verilog system design at Karunya University Attended workshop on lab view design at Karunya University Participated workshop on ... - 2020 Nov 02
Engineering Ece
Chennai, Tamil Nadu, India
... *Attended value added course on DIGITAL DESIGN USING VERILOG HDL with A graded in the academic year 2019-2020 at M I E T ENGINEERING COLLEGE, trichy. PERSONAL DETAILS Address 274/61d1, Ganesapuram, New Street,Trichy Road, Namakkal. NAMAKKAL, Tamil ... - 2020 Oct 27
... *Attended value added course on DIGITAL DESIGN USING VERILOG HDL with A graded in the academic year 2019-2020 at M I E T ENGINEERING COLLEGE, trichy. PERSONAL DETAILS Address 274/61d1, Ganesapuram, New Street,Trichy Road, Namakkal. NAMAKKAL, Tamil ... - 2020 Oct 27
Engineering
Chennai, Tamil Nadu, India
EDUCATION WORKSHOPS ATTENDED PROJECT PRAVEEN KUMAR B OBJECTIVE SOFTWARES HFSS, CST And Xilinx PROGRAMMING KNOWLEDGE Verilog Coding, HTML, CSS and Basic knowledge in C and C++ To secure a challenging Position in a company that allows me to utilise ... - 2020 Oct 21
EDUCATION WORKSHOPS ATTENDED PROJECT PRAVEEN KUMAR B OBJECTIVE SOFTWARES HFSS, CST And Xilinx PROGRAMMING KNOWLEDGE Verilog Coding, HTML, CSS and Basic knowledge in C and C++ To secure a challenging Position in a company that allows me to utilise ... - 2020 Oct 21
Engineering Data
Chennai, Tamil Nadu, India
... • Electronics production,manufacturing,quality • Verilog HDL module,MS word. Academic project: Title: Semi dynamic under water wireless sensor network based on differential evoluation motion planning. Description: This project is developed to energy ... - 2020 Oct 13
... • Electronics production,manufacturing,quality • Verilog HDL module,MS word. Academic project: Title: Semi dynamic under water wireless sensor network based on differential evoluation motion planning. Description: This project is developed to energy ... - 2020 Oct 13
Engineering Inplant Training
Chennai, Tamil Nadu, India
... School Egmore, Chennai, India 12th (HSC)– Physics, Chemistry, Math, Biology – Percentage: 89 % May 2016 10th (SSLC) – Percentage: 96 % May 2014 Test Scores: GRE (2/1/2020) IELTS – 7.0 (L-7.5, R-6.5, W-6, S-7) Skill Set: C, C++, MATLAB, Verilog, MS ... - 2020 Oct 07
... School Egmore, Chennai, India 12th (HSC)– Physics, Chemistry, Math, Biology – Percentage: 89 % May 2016 10th (SSLC) – Percentage: 96 % May 2014 Test Scores: GRE (2/1/2020) IELTS – 7.0 (L-7.5, R-6.5, W-6, S-7) Skill Set: C, C++, MATLAB, Verilog, MS ... - 2020 Oct 07
Office Engineering
Chennai, Tamil Nadu, India
... • Verilog HDL module. Academic project: Title: Semi dynamic under water wireless sensor network based on differential evoluation. Description: This project is developed to energy stored and capability to the wireless network according to the ... - 2020 Sep 27
... • Verilog HDL module. Academic project: Title: Semi dynamic under water wireless sensor network based on differential evoluation. Description: This project is developed to energy stored and capability to the wireless network according to the ... - 2020 Sep 27