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Birdsboro, PA
... Develop single lines, three lines for Large Tier 3 & 4 data centers, 480/277- and 416/230-volt UPS systems, and multiple large paralleling generator backups. 230-69 kV, utility substations, 34.5 kV- 4.16 kV- 480-volt industrial substations, 800 MW ...
- Mar 06
Boston, MA
... Helping in the development of workflows like Approval WFs, Account Generator WFs etc. Environment: Oracle EBS 11i-Fixed Assets, General Ledger, Accounts Payable and Accounts Receivable, Cash Management Client: Hitachi Data Systems, Santa Clara, CA ...
- Mar 06
United States
... Developed Informatica mappings using various transformations like update strategy, lookup, Aggregator, Rank, router, joiner, sequence generator and expression transformations to move the data from source to target. Creating Mappings, Session, ...
- Mar 06
New York City, NY
... A custom string ID generator was implemented, allowing different prefixes for entities that are configured in the development and production Yaml property files. Used Agile practices and Test-Driven Development techniques to provide reliable working ...
- Mar 06
Katy, TX
... MCC and Switchgear for Circuits and Protection and Coordination for the Generator, Transformers and Circuits Breakers, Medium voltage Switchgears(MVSG), Contactors, Relays Desing and coordination, VFD and Control. MCC Design, 480V. Panel Control ...
- Mar 06
Atlanta, GA, 30309
... cloud (IICS) to design and developed complex ETL mappings making use of transformations like Source Qualifier, Joiner, Update Strategy, Connected Lookup and unconnected Lookup, Expression, Router, Filter, Aggregator and Sequence Generator. ...
- Mar 06
San Diego, CA
... CV60 Anchor Windlass, Package Handling & Weapons Conveyors, Diesel & Electrical Generator sets, O2N2 Plants for AS Type Ships, etc.. 3/82 - 1/86 U.S. Navy Machinist Mate - MM3 Completed US Navy Machinist Mate A School, Advanced machinist Mate School ...
- Mar 06
Portland, OR
... • Developed components like Generator, Driver, Monitor, Scoreboard, and Environment. [SystemVerilog] Simulation of DDR5 Memory Controller Scheduling Algorithm • Simulated a DDR5 memory controller for a 12-core 4.8 GHz processor with a 16GB PC5-38400 ...
- Mar 06
Atlanta, GA, 30338
... “Third HIV DRP Symposium on Antiviral Drug Resistance” Organized by HIV Drug Resistance Program, National Cancer Institute at Chantilly, Virginia, December 8-11, 2002. 20. Schinazi RF, Mellors J, Erickson-Vitanen S, Mathew J, Parikh U, Sharma P, ...
- Mar 05
Little Elm, TX
... Linear Integrated Circuits TECHNICAL SKILLS Hardware tools: Multimeter, Spectrum analyzer, Oscilloscope, Function Generator, Power Supplies, Soldering iron Design tools: Cadence Allegro, Cadence Virtuoso, Altium Designer, LabView, Advanced ...
- Mar 05