| Resume alert | Resumes 21 - 24 of 24 |
PMP , PMI-RMP , Primavera P6, Caesar-II (Static & Dynamic), AutoCAD
Patna, BR, India
... Carry out site survey activities at field to assist the designer to develop 2D Piping GADs and Tie-in isometric drawings for critical lines. Responsible for establishing base documents, project procedures, standards, specifications to be used for ... - 2017 Nov 23
... Carry out site survey activities at field to assist the designer to develop 2D Piping GADs and Tie-in isometric drawings for critical lines. Responsible for establishing base documents, project procedures, standards, specifications to be used for ... - 2017 Nov 23
Power Plant Project
Patna, BR, 804452, India
... Operating System: Windows 7, XP, vista PROJECT DETAILS : Project name: SMART PROTECTION SYSTEM FOR THE MINES WORKERS Duration: 6 Months Role: Designer & Developer Details: In this implementation of smart protection system we used three different ... - 2013 Jun 15
... Operating System: Windows 7, XP, vista PROJECT DETAILS : Project name: SMART PROTECTION SYSTEM FOR THE MINES WORKERS Duration: 6 Months Role: Designer & Developer Details: In this implementation of smart protection system we used three different ... - 2013 Jun 15
High School Electrical
Patna, BR, India
... Minor Project:- • Topic - Water Level Controller • Team Size -3 • My Role - PCB designer and maker • Description -Water Level Controller is a circuit to save the wastage of water from overflowing to the water storage tank. Extracurricular Activity:- ... - 2013 Jun 14
... Minor Project:- • Topic - Water Level Controller • Team Size -3 • My Role - PCB designer and maker • Description -Water Level Controller is a circuit to save the wastage of water from overflowing to the water storage tank. Extracurricular Activity:- ... - 2013 Jun 14
Design Project
Patna, BR, 800006, India
... The outputs of the decoder and SR latch are verified using custom designer. Later in the projects we use the same decoder and SR latch and verified the output of SRAM. The outputs of the SRAM using Verilog and the outputs of SRAM using Custom design ... - 2012 Dec 16
... The outputs of the decoder and SR latch are verified using custom designer. Later in the projects we use the same decoder and SR latch and verified the output of SRAM. The outputs of the SRAM using Verilog and the outputs of SRAM using Custom design ... - 2012 Dec 16