Gate resumes in Union City, CA

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Java Developer Software

San Jose, CA
... Science 2013 Baba Banda Singh Bahadur, Fatehgarh Sahib, India Technical Skills Programming Languages: J2ee,java core, C, C++ (OOPS), C#,Git-GitHub DBMS: SQL Server, My SQL, Oracle Achievements Qualify Graduate Aptitude Test Enginxeering (GATE )2013. ... - Jul 19

Electrical Engineer Engineering

San Jose, CA
... in Verilog Functional verification- Synopsys VCS Logic Synthesis-Design optimization- Timing, area and power in Synopsys DC & gate-level netlist Test pattern generation for the synthesized netlist in TETRAMAX ATPG Post-synthesis simulation- Synopsys ... - Jul 13

Data Social Media

San Jose, CA
Nishtha Sapra 415-***-**** ****, ***** **, *** ****, CA 95133 EDUCATION Masters’ of Science in Information Technology Management (Major in Data Analytics), (2017-2018) GPA: 3.5/4.00 Golden Gate University, Edward S. Ageno ... - Jul 11

Engineer Design

San Leandro, CA
... o Performed functional verification on gate Level & verified design O/P using enhanced test bench. • Standard CELLS Design. o Design of Basic logic Gates & Sequential cell Layouts with various Inputs & drive strengths (60 Std cells.) o Overview of ... - Jun 29

IT management

San Francisco, CA
... for NEC, Shoretel phone system and Security Gate system Providing strategic and tactical planning, development, evaluation, and coordination of information and technology systems Functioned as the Information Security head for the IT organization. ... - Jun 28


San Francisco Bay Area, CA
LIN ZHAO ***** ***** ****, *******, ** ***** 510-***-**** EDUCATION Golden Gate University School of Law, San Francisco, California Doctor of Jurisprudence, May 2016 Honors: Dean’s List, Fall 2015 Northwestern Polytechnic ... - Jun 25

Quality Assurance Engineer (Automation)

Sunnyvale, CA
... Education and Training MS in Information Technology Management (Business Analytics Concentration), Golden Gate University Bachelor of Engineering from SATI (Samrat Ashoka Technological Institute), Madhya Pradesh, India Infosys 5 months Foundation ... - Jun 22

CAD/EDA /PDK development/Physical design engineer

Campbell, CA
... Developed new tools and methods to further automate commercial tools by creating configuration file, GUI, and essential functions for R3D/RMAP, schematic design capture, ADE/ADEXL simulation (Spectre, AMS, bda, Golden Gate), layout tools such as ... - Jun 20

Senior Project Manager, Cross-Functional

Walnut Creek, CA
... Performance Improvements Incentives Performance Measurements, KGI, KPI, Metrics Peripherals PFS Patient Financial Services Phase Gate review & approval process PL/SQL Stored Procedures Plan incremental iterations Planisware Planning Planner Planview ... - Jun 14

Test Technician

Santa Clara, CA
... • Programming anti fuse based Field Programmable Gate Arrays ( FPGAs ). • Follow all Test Specs and Flows to test the ICs. • Visual Inspection and co-planarity, and marking permanency tests. • Track all testing and completing all lots for finish ... - Jun 12
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