Design Electrical Engineering

Rana Biniazan

*** ***** ***** **., ***. **** Phone 480-***-**** Chandler, AZ 85226 Cell 480-***-**** Email ************@***.***

OBJECTIVE: Opportunity to apply my attention, creativity, practical skill, towards the design, layout, and simulations in the areas of analog and digital circuit include VLSI

EDUCATION:

Linux Operating May 2012

Master’s Program, Electrical Engineering December 2011 Bachelor of Science in Engineering, Electrical Engineering May 2008 Dean’s List Spring 2007 TECHNICAL SKILLS:

Tools: Cadence ICFB (schematic capture, Simulations using Spectres, layouts transistor level, DRC, Extraction, and LVS)

Operating Systems: Unix/Linux kernel

ANALOG LAYOUT TECHNIQUES:

Current Mirror: Designed for better matching and less parasitic capacitance and resistance using common centroid, dummy poly strip, fingering

Differential pair: Using common centroid to minimize the first-order effects of mismatch

CLASS PROJECTS:

Analog Circuit Design

CMOS β-Multiplier Based Constant-GM Current Reference: Designed a reference current independent of the power supply and ground changes. Telescopic Cascode Differential Stage Design: Designed a differential amplifier to improve gain. Single-Ended Folded Cascode Amplifier: Created a symmetrical schematic and layout using a common centroid for the differential pair in the amplifier. 50 Ω Driver Amplifier: Designed a folded cascode differential amplifier with two floating current sources and the bias class AB output stage.

Two-Stage Op with above 50 dB Gain and 8Ohm Resistor: Created a reliable two-stage circuit with a differential amplifier and an active load circuit.

VLSI Circuit Design

One-Bit Full Adder (include input & output latches): Designed a low operating, considering speed, average energy, lowest energy-delay product (EDP), and minimum Area for layout.

32-Bit Adder: With a partner created a Sklansky adder, considering speed, power dissipation.

32-Bit Register File with Decoder: Cooperated on a team of three to create a 32-bit register file with decoder, three read ports, one write port, and input and output latches/flip-flops. GRADUATE COURSE LIST:

Analog Integrated circuits and Advantage, Digital systems and circuits, VLSI design, Switched capacitor analog design, communication transceiver circuit design

EXPERIENCE:

Grader for Electrical Engineering Classes, August 2009 – December 2010

Fundamentals of Analog Circuit Design (EEE120), Circuit Design I & II (EEE202, EEE334), Analytic Circuit Design (EEE335)

ACTIVITIES:

Volunteered, third grade, Sureno Elementary School; volunteered, kindergarten, Mesa Arts Academy; volunteered, 2006 Arizona State University Youth Astronomy Fair; current hobbies--puzzles, reading novels, watching the Lifetime Channel

LANGUAGES: Persian, Azeri, English,

Gained English proficiency, completed general studies, Mesa Community College, Mesa, AZ, 2002--2005

Maricopa Community Colleges’ Honors Program Scholarship, Fall 2003, Spring 2004, Fall 2004, Spring 2005 Maricopa Colleges Foundation Scholarship 200

WORKING VISA STATUS: Employment authorization, renewable yearly (EDA)

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