Project Design

GOPIKRISHNA.CH

Mobile: +91-901*******; Email: wav8m4@r.postjobfree.com

Seeking to work in an innovative and competitive environment which provides an opportunity to utilize my skills and realize my potential with a total commitment for excellence

Basic Knowledge on Synthesis, Static Time Analysis, floor planning, placement, CTS, Routing

Well versed with all the verification runs required for tape out including DRC, LVS, ANTENNA, DFM, and LATCHUP.

Basic knowledge on analog layout matching techniques.

A quick learner with an analytical bent of mind coupled with zeal to utilize and enhance ideas, knowledge and skills.

Confident and hardworking with inherent focus on quality.

Pursuing Master’s (Part Time) on VLSI Design in M.S.Ramaiah college in Bangalore.

Pursued Diploma in ASIC Design from RV-VLSI Design Center,

Bangalore (Aug 09 – Jan 10).

Pursued Diploma in Electronics from NTTF.

S.S.C. from Board of Secondary Education, Andhra Pradesh.

Good understanding of Custom flow

Good knowledge on Synthesis, Static Time Analysis, Floor planning, placement, CTS, Routing.

Knowledge to review and use Tools for design process

Synthesis tools Design Compiler

STA tools Prime Time

Layout tools Virtuoso Layout Editor, mentor graphics ic-studio

Verification tools Mentor Graphics Calibre

PnR tools Basic knowledge of Astro

Total 3.3 Years of Industry Experience and 6 months of Training Experience.

Worked in EDUTECH NTTF IND.PVT LTD as a Diploma Trainee for 1.2years.

Have 8 months of Training Experience in RV-VLSI Design Center in ASIC Design.s

Worked in HCL Technologies, as a Testing Engineer for 2.1Years

Project : Digital-TV Product Testing.

Tools : Defect Management, Requirement Management tool and Tera-Term.

Description: It’s a leading product in Consumer Electronics field which has more advanced features to interface with Digital Devices using HDMI, DVI, Analog interface and LAN (wired and wireless configuration).

Roles and Responsibilities:

Preparing Test cases based on UI specifications.

Verifying the functionality by executing test cases.

Finding defects and register them in Defect Management tool and track them till it is fixed.

Giving presentation to the team on new enhancements.

Have basic knowledge in using Macros in MS Excel.

Achievements:

Appraised by Client for unearthening critical defeats.

Selected as Sub TL for clearing peer’s doubts and taking initiative at work.

Selected as Best Performer in 2011 (JFM Quarter).

Project Title: Custom Layout of Differential

Amplifier Tools : Cadence Virtuoso, Mentor Graphics

Calibre

Role:

To draw the Layout of Differential amplifier

Physical verification of layout (DRC, LVS, Parasitic Extraction)

Summary: Learnt about the purpose of using MATCHING Techniques ,Using of P-cells ,physical verification,learnt

about the different steps involved in Custom Layout Flow.

Project Title: Physical design of UART(130nm) Tools:Synopsys(Astro),Cadence(virtuoso), Mentor Graphics (calibre)

Role:

To perform block level

o Floor plan,Placement,Clock Tree Synthesis

o Routing

o Physical Verification & DFM issues

o IR Drop Analysis

Summary: Performed all the above steps successfully by debugging the challenges faced and completed the

physical design of UART and got familiar with tool related options.

Project Title: PDK Migration from Cadence to

Mentor Graphics(180nm) Tools : Cadence , Mentor Graphics

Role:

To draw the schematic for the netlist provided.

Stream out GDS from cadence environment

Stream in GDS to Mentor Graphics environment

verification of schematic (only LVS)

Summary: In PDK Migration we are creating an environment of 180nm for Mentor graphics flow.

For this layout of standard cells in Cadence environment is golden reference. we stream out the

GDS from cadence and stream it in to mentor graphics and perform the lvs check for the schematic

done in Mentor graphics.

Project Title: Inverter Custom Layout (.18um) Tools: Cadence Virtuoso, Calibre

Role:

Analysis of inverter using spice models and drawing the schematic for the same.

Responsible for Custom layout design of Inverter.

Involved in clearing DRC, LVS, and PEX.

Summary: Introduction to layout editor. Learnt about the purpose of different layers used in the fabrication

process and also delay variation depending on supply voltage, transistor sizing and output load. Also

learnt about the different steps involved in Custom Layout Flow.

Project Title Tools

Parking Lot Control Protel For Windows

Role : Circuit design, PCB Design & Fabrication

Summary : Here 2 sensors used One is for Entering. Other is for leaving car, when

Leaving the car, there was a person to collect the money for parking the car.

Skills:

A quick learner with an analytical bent of mind coupled with zeal to utilize and enhance ideas, knowledge and skills.

Confident and hardworking with inherent focus on quality

Good Team Player

Positive attitude

Date of birth : 24th Oct, 1989

Language proficiency : Telugu, Hindi & English

Permanent address : kudapa village, Krishna (Dt.), Andhra Pradesh ,521215

Passport Number : H0252585

I here by declare that the above details are correct and complete to the best of my knowledge and belief.

GOPIKRISHNA.CH

Contact this candidate