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Process Integration Device Technology Engineer

Location:
austin, TX, 78739
Posted:
October 01, 2009

Contact this candidate

Resume:

KANGSOO YI

**** ****** **** ****

Austin, TX ****9

Email : *********@*****.***

Phone(Home) : 512 – 394 - 1954

(Cell) : 512 – 968 – 7343

Resident Status : Permanent Resident

Language Capability : Korean, English, and Japanese

OBJECTIVE

To be a member of a multi-disciplinary research and development team working to address materials processing and integration issues in the semiconductor/high tech industry.

PROFESSIONAL EXPERIENCES

Spansion LLC. Foundry Technology Group 7/2007 – 2/2009

Title : Member of Technical Staff

PROCESS INTEGRATION & DEVICE TECHNOLOGY ENGINEER

- Managed teams to initiate and establish foundry project for 65nm Nonvolatile Memory Device Technology – Process Flow Design including specification and metrology, Equipment/Recipe Matching, and Technology Qualification

- Provided technical expertise and foundry interface for the successful technology transfer, with responsibility for device design, parametric behavior, and specification

- Provided technical expertise to foundry partners on device parametric performance issues for continuous improvement

- Led FEOL and MOL module teams – STI, Bitline, Wordline, Spacer, CoSi, Contact1

- Troubleshoot the process problems/excursions and working closely with foundry partners to enhance production yield.

- Designed and authored plans/split experiments related to device reliability

- Electrical Characterization and Analysis with respect to Device Failures

- Led Technology Qualification through product reliability, device characterization including Bench Measurement, FA analysis, SPC control, Control Plan Establishment, and FMEA.

Spansion LLC.(Former ADVANCED MICRO DEVICES) 5/2002 – 7/2007

Title : Member of Technical Staff

PROCESS INTEGRATION & DEVICE TECHNOLOGY ENGINEER

- Managed teams for transfer new novel technology into mass production and implement processes for device performance – Process Flow Design including specification, coordinating team members, running experiments, deciding lot disposition, and weekly reporting to top management.

- Research and Development of SONOS based Nonvolatile Memory Device technologies (110nm, 90nm, 65nm)

- Focused on integration of the newly developed processes

- Identified root causes and executing experimentation with manufacturing of modules in the production line.

- Troubleshoot the process problems/excursions and working closely with Product Engineer to enhance production yield.

- Managed multiple issues/projects cross-functional teams

- Led FEOL modules for all MB technologies. - STI, Bitline, Wordline, Spacer, CoSi, Contact1

- Electrical Characterization and Analysis with respect to Device Failures

- Led Technology Qualification through product reliability, device characterization including Bench Measurement, FA analysis, SPC control, Control Plan Establishment, and FMEA.

FUJITSU MICROELECTRONICS, INC. 2001 - 2002

Title : DEVICE PROCESS INTEGRATION ENGINEER

- Performed Electrical Characterization of Device( Flash Memories )

- Analyzed Wafer level Electrical Test(WET) data to qualify/release Thin film, Etching,

Photo, Diffusion, and Implantation equipment for production.

- Troubleshoot the process problems/excursions to enhance production yield.

- Created and authored plans/projects related to improving device reliability and

process development.

- Reviewed SORT data, and work to solve a data bin problem with both Product

Engineer and KLA group(defect review).

- Employed SPC to drive improvement of Cp and Cpk.

- Major accomplishments include :

• WEE(Wafer Edge Exposure) change for 7 process stages.

• Additional post treatment trial for 5 process stages.

• Established optimal process conditions for implantation + etching.

• Device reliability- determined root cause and devised a solution to problem of degraded device erasing characteristics.

NORTH CAROLINA STATE UNIVERSITY 1999 - 2001

Title : VISITING SCIENTIST and Ph.D CANDIDATES

- Electrical characterization of Metal-contaminated MOS Capacitors with 9nm, 5nm, and

3.5nm thick oxides

- Investigated the impact of Cu and Ni contamination levels on GOI(Gate Oxide Integrity) for

very thin oxides(6-9nm).

- Compared GOI between thin and thick oxides for low level Cu and Ni.

- Used MOS-EBIC to determine whether isolated or uniform interface breakdown sites

are the dominant failure mechanism.

SUNGIN ELECTRONICS, INC. 1997 - 1999

Title : SENIOR RESEARCHER

- Developed a gas sensor to measure the density of both oxygen and carbon dioxide obtained

from the respiratory gas.

UNIVERSITY OF TEXAS AT DALLAS 1995 - 1996

Title : Ph.D. STUDENT

- Plasma Diagnostics regarding both Actinometry and Absorption Spectroscopy.

- Studied plasma density, plasma energy distribution in Inductively Coupled Plasma

(ICP) reactor driven by 13.56MHz RF source. In recent high tech IC industry, ICP plasma

has been widely used for the ashing process.

- Worked in the semiconductor processing division of Texas Instrument(TI) in a joint

project between Sandia National Laboratory and TI.

Teaching :

- Fundamentals of Engineering Circuit Analysis for Undergraduate.

- Integrated Circuit Laboratory for Undergraduate.

- Semiconductor Device Theory for Undergraduate.

- Semiconductor Integrated Circuit Processing Technology for Undergraduate.

- Semiconductor Processing Technology for Graduate.

- Quantum Physical Electronics for Graduate.

- Plasmas of Semiconductor Fabrication for Graduate.

-

UNIVERSITY OF TEXAS AT ARLINGTON 1991 - 1994

Title : M.Sc STUDENT

- Studied the effects of hydrogen molecules in diamond films grown by Chemical

Vapor Deposition(CVD) using positron annihilation spectroscopy(PAS).

- Investigated defects and electronic structure of diamond films using PAS.

- Characterized vacancy-type defects in Si using PAS.

EDUCATION

Ph.D(Thesis Completion) University of Texas TX-Dallas, Electrical Engineering(1996)

M.Sc, University of Texas TX-Arlington, Physics Department(1993)

B.Sc Chonbuk National University, Physics Department(1990)

SKILLS

Computer Programming, SEM, CVD, MOS-EBIC, AFM, PROMIS,

MS Office : Excel, Powerpoint, Word, Trilingual-Korean, English, Japanese

AWARDS and HONORS

Vice President Award in Spansion, LLC

National Researcher supported by Korean Science and Engineering

Foundation(KOSEF), 1998-1999

University Scholarship(UTD Academic Scholarship), 1995-1996

University Scholarship(UTA Academic Scholarship), 1991-1994

The Chonbuk Regional Award for excellence in Physics, 1988.

University Scholarship(Chonbuk National University), 1986-1990.

References will be furnished upon request.



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