Project Manager Engineer

Vernon M. Toussaint

***** ******* ** *** **** • Dallas, TX 75252 • 978-***-**** • ***********@*****.***

QUALIFICATION SUMMARY

• M.Sc. in Information Systems & B.Sc. in Electrical Engineering.

• Strong and extensive background in IC products electrical testing, analysis, product management, quality monitoring strategies and yield improvement.

• Excels at collaborating across departments; coordinating with staff and senior managers to complete projects on time and within budget.

• Strong manufacturing production background & proficiency with laboratory test and measurement tools.

• Excellent quantitative, analytical and writing skills.

TECHNICAL SKILLS

• Application Programming: C/C++, SQL, PL/SQL, Java, BASIC, UML, Pascal.

• Applications: dPower, JMP, MS Office, MS Project, Visual Studio.

• Concepts: Object-Oriented Programming, Database Design/Normalization, Writing UML, Design of Experiments, SPC (Six Sigma, Cpk), Project Management.

• Professional Strengths: Project Management, Electrical Testing/Analysis, Product Characterization, Cross-Functional Collaboration, Process Improvement, Cost Reduction.

PROFESSIONAL EXPERIENCE

Jan 2007 Staff Product Engineer

- Present Intersil Corporation, – Richardson, TX

• Project manager providing leadership and management of multiple IC development projects through the life cycle phases: from design through post production support.

• Supporting cost reduction, yield improvement and customer return activities.

• Deriving production test limits using statistical methods and ensuring that products comply with data sheet electrical and reliability specifications.

• Performing product characterization using tester, bench and thermo stream as well as reviewing results with core development team.

• Cross-functional coordinating/collaborating with a team of engineers from design, marketing, applications, product and test to achieve critical project milestones, customer samples and timely product release.

• Generating and presenting project schedules, development costs and Finished Goods costs as part of Business Plan review.

• Ordering masks and wafers from external foundries and planning assembly builds of packaged parts for product qualification and production release.

• Responsible for pre-silicon planning, executing customer samples delivery and driving manufacturing readiness.

• Developing, organizing and presenting program metrics to management during Quarterly Reviews.

• Conducting project post mortems with management to identify continuous improvement opportunities by examining successful and unsuccessful project elements.

• Facilitating recurring team meetings with emphasis on tracking and closing open actions to achieve project milestones.

Nov 2001 Chute Yield Enhancement Engineer

- Jan 2007 Analog Devices, Inc., – Wilmington, MA

• Drove trim/probe and final test yield enhancement and cost reduction activities of integrated amplifier products.

• Worked as a member of New Product Release Team to ensure the successful test development, characterization and release to production of high speed amplifiers.

• Developed plans for process change and led engineering evaluation studies for fabrication transfer of Bipolar and HVBP processes from Sunnyvale to Wilmington within the aggressive 6 months schedule.

• Formulated concise trim/probe and final test yield analysis for 4” to 6” wafer fabrication transfer and polyimide fabrication process change.

• Chaired ADWIL Trim Material Review Board, updated/distributed meeting minutes and, along with other members, decided disposition of discrepant material.

• Active participant in recruiting new college graduates from my alma mater, UCF, to the company.

• Mentored new engineers and supervised interns.

Jun 1997 Manufacturing Product Engineer

- Nov 2001 Analog Devices, Inc., – Wilmington, MA

• Worked closely with local and off-shore new product teams to support silicon debug, product characterization, product validation and manufacturing release of integrated amplifier product.

• Implemented targeted product engineering projects for improving final test yield.

• Developed yield evaluation plans to compare automatic test equipment (ATE) results to bench test performance.

• Optimized final test flows for increased quality and cost improvement;

• Worked closely with external and internal test sites to ensure smooth high volume production.

• Supervised interns and technician.

EDUCATION

Sept 2003 M.Sc Information Systems GPA: 3.6/4.

- May 2006 Northeastern University, Boston, MA

Jun 1995 B.Sc Electrical Engineering GPA: 3.2/4.

- May 1997 University of Central Florida, Orlando, FL

Aug 1989 A.Sc Quality Control and Reliability Control GPA: 4.0/4.

- Aug. 1991 Central Florida Community College, Ocala, FL

HONORS

Dean’s List (Spring 96, Fall 96, Spring 97):

University of Central Florida

President’s List (all semester 1989 –91), Valedictorian:

Central Florida Community College

Professional Award:

Multiple recent incentive awards for dedication and project execution.

AFFILIATIONS

Phi Theta Kappa Honor Society

Institute of Electrical and Electronic Engineers (IEEE).

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