Electrical Engineer Design

CALLIE A. RILEY

*** ******** ****** **, **** Bay, Florida 32907

(H) 321-***-**** (C) 321-***-**** ********@*********.***

ELECTRICAL ENGINEER

Focused, results-driven and quality conscious Electrical Engineering

Professional with extensive experience in digital design and product

development. Focused and determined - known for demonstrating initiative in

evaluating problems and developing corrective solutions. Intelligent and

articulate, a collaborative team player, with excellent communication and

interpersonal skills.

PROFESSIONAL EXPERIENCE

DRS TACTICAL SYSTEMS, Melbourne, Florida 09/2005 - 11/2011

Electrical Engineer II (03/2006 - 11/2011)

Designed, developed, analyzed, documented and supported product testing.

Within the Armor Ruggedized Tablets Product Development Group, involved in

Digital Hardware Design, Schematic Capture, PCB layout, Assembly mechanical

drawings, Prototype testing to reduce key development risks, functional

testing, and documentation of complete design package using Agile. Created

wiring diagrams and directed creation of assembly mechanical drawings, and

performed prototype and functional testing for Cable Designs. Documented

complete design package in Agile.

Accomplishments:

. Tested the Main and Auxiliary Antennas for the WWAN and WLAN

using the Vector Network Analyzer, discovering that performance did not

meet design specification. Generated a report, including the frequency

plot captured, enabling required performance improvements, and allowing

Tablets to meet customer delivery dates.

. Performed Noise Profile Test (NPT) in an EMI Chamber to

determine the RSSI level. Generated report used to reduce noise; in

order to pass cellular certification for Armor Tablets, which had

previously failed the certification due to excessive noise; and meet

production schedule

. Reviewed design of IO board used in Desk Docking Station and

recommended methods to reduce costs of production. Discovered numerous

capacitors were in the $16.00/each price range. Researched and located

comparable capacitors in the $2.00 - $3.00 price range. Efforts saved

$40.00 per board.

. Re-designed driver board to support display specification for

the .Armor X10 Tablet that was being upgraded with an improved LED

display because the current LED driver circuitry to control LED

backlight did not support new display.

. Designed a flex cable to connect the IO from the X7 Tablet Pogo

Connector to the DB25 connector on the Docking Station. As a result, the

Docking Station met cost and schedule commitments.

Test Operator (09/2005 - 03/2006)

Performed Pre-ESS and final testing of Applique Ruggedized Computer to

verify readiness for shipment to military customer. Also tested Centrino

processor and IO boards, programmed LED boards and Digitizer grids, and

tested H8 programmer.

GE ENERGY, Melbourne, Florida 07/1992 - 09/2003

Staff Engineer

C programming on UNIX platforms for applications on Data Acquisition and

Control (DAC) subsystems. Wrote C applications for Digital Data Links for

the ICCP protocol on UNIX platforms. Implemented logical tables for 16

views for ICCP Data Link software application running on a Sun platform.

Generated tables in Oracle / Sybase with use of SQL scripts. Re-designed

12U VME bus custom backplane with Controller and Arbiter functionality.

Accomplishments:

. British Utility Company project involved ICCP Data Links, and was

assigned to Data Base task, involving the configuration of ICCP Data

Links at seven different Control Centers. Took over existing project and

re-designed the configuration and data base content for all Control

Centers, which included thousands of Status, Analog and Accumulator

points. Completed task requiring in-house and on-site testing in the UK

on time and within budget.

. Addressed issue with ICCP Data Link during data base update, by

implementing software change to prevent Data Link failure. Saved GE

approximately $300,000 in new hardware.

. Assigned to complete a VDBA, 12U VME bus Controller/Arbiter, purported

to require minimal changes. Board required re-design and a significant

increase in components to add missing functionality. Re-designed the

VDBA (VME Dual Bus Adapter), a 12U VMEbus custom 200 IC digital VMEbus

Controller, Arbiter and VMEbus driver circuitry using Viewlogic. Led

layout effort with Drafting, using Scicards, supporting requirement of

impedance matching of signal traces. Board met requirements and

customer's expectations.

HARRIS SEMICONDUCTOR, (INTERSIL) Palm Bay, Florida 05/1988 - 02/1991

Lead Engineer

Member of DSP Strategic Marketing group, developed concept and design of a

Digital Filter Chip. Researched new product ideas; obtained marketing

studies; created Product Marketing Reports; and conducted visits to

prospective customers to gain feedback on product definitions.

Accomplishments:

. Selected to develop product concept and architectural design of

Decimating Digital Filter (DDF). Researched digital decimation filters;

created product definition; and led team of four Engineers representing

Design, Test, Product, and Applications Engineering during development

and verification phases.

. Addressed customer need for Filter Design software package to generate

DDF coefficients. Created concept; directed development; and coordinated

performance evaluation of a design/simulation MS-DOS based support tool

with third party design firm. Oversaw code development; provided input

regarding user interface; and verified that filter algorithm

implementation was correct. Due to component's complexity, wrote data

sheet.

HARRIS GOVERNMENT COMMUNICATIONS SYSTEM Palm Bay, Florida 02/1981 -

05/1988

Lead Engineer

Member of the Modem Engineering Group participated in the development of

test fixture hardware and Z80 Assembly Language Programming to provide

functional testing of Communication Modems.

Accomplishments:

. Digital Design of a Z-80 Microprocessor based controller to test

communication modems. During the testing phase, the system requirements

changed, requiring the clock speed of the processor to be doubled to

accommodate additional software requirements. Due to the timing margins in

the design, a re-design was not required hence keeping the project on

schedule and within budget.

. The development of Assembly Language Programming (Z80) to be run on Z-

80 based controller test beds. In addition, documentation of the Design,

the test procedure and the test results was also done. Finally, digital

designs in TTL, CMOS and ECL were implemented.

EDUCATION / CERTIFICATIONS / SKILLS

BSEE - Florida Atlantic University, Boca Raton, Florida

Cadence HDL Cadence Allegro ? Digital Design Digital Test and

Debug Agile

C Language Vector Network Analyzer Spectrum Analyzer Microsoft

Office Suite

PUBLICATIONS / PRESENTATIONS / AFFILIATIONS

Patent on the HSP43220, Decimating Digital Filter. High-Decimation Digital

Filters, 1991

IEEE Acoustics Speech and Signal Processing Proceedings, VLSI

Implementation of a Wide Band, High Dynamic Range Digital Drop Receiver,

1991

IEEE ASSP Proceedings, Hybrid Implementation of the Wigner Distribution and

Other Time-Frequency Analysis Techniques, 1989

IEEE International Symposium on Circuits and Systems (ISCAS).

Deci Mate User's Manual, Harris Corporation, 1991

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