Deepak Acharya Email: ******.*********@*****.***
Mob : 91-953*******,91-949*******
Web: in.linkedin.com/in/acharyadeepak89
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Objective:
Achieve success in a position of research and design in the field of VLSI, utilizing my technical and soft skill for a mutually beneficial relationship with my organization
Educational Qualification:
Examination passed University/Board School/Institute Marks Year of passing
Bachelor of Technology (Electronics and communication Engg) Biju Patnaik University of Technology, Orissa Roland Institute of Technology, Berhampur, Orissa 7.08
CGPA 2011
12th
(Higher Secondary) Council of Higher Secondary Education, Orissa Jagannath Sc. College,Berhampur 68.4% 2007
10th
(Secondary) Board of Secondary Education, Orissa Rutapalli Vidyapitha,
Bhubaneshwar 70.4% 2005
Tool Exposure:
Languages C, C++,Assembly Language, VHDL, Verilog
EDA Tools Orcad PSpice, Xilinx, Active HDL, Model-Sim (Verilog, VHDL), Tanner layout tools
Operating Systems MS-DOS 6.22, Windows9x/2000/XP
Others MS-Office, Matlab
Training and Courses:
• 30 days summer training on VLSI and EDA tools at National Institute of Science & Technology, Berhampur.
• 30 days summer training on SUKHOI 30 from HAL, Lucknow.
• Five month training on VLSI FPGA/ASIC design from Vector Institute, Hyderabad.
Technical Papers:
• “The New Lines In IC Design”: If deep submicron ICs are to excel in yields and performance, the design process must focus throughout on their interconnections.
• “WAP Wireless Application Protocol” is a technical standard for accessing information over a mobile wireless network. A WAP browser is a web browser for mobile devices such as mobile phones (called "cellular phones" in some countries) that uses the protocol.
Projects:
Project name: Data Hiding Using Steganography
Description: The art and science of hiding information works by replacing bits of useless or unused data in regular computer files with bits of by embedding messages within other, seemingly harmless messages.
Academic Achievements:
• Student member of ISTE Technical Societies.
• Attended the technical fest UTKERSH 07, 08 AND 09 RIT, BERHAMPUR.
• A successful competitor in telecommunication fest COGNIZENT.
• Participated in VLSI and Embedded system two day college level symposium SCINTILATION.
Personal Details:
Date of Birth: 18th September 1989
Strengths: Multitasking, Ability to learn quickly
Residence address:
c/o Santoshi Charana Ratha
696/B Priya Nivas, Vinayak Nagar B-block
Murugeshpalya Bangalore 560017