**** ***** ***** **, *******, VA ***** Home: 804-***-****
e-mail: **********@*****.***
http://www.linkedin.com/in/cjgould
PROCESS CONTROL ENGINEER / DATA ANALYST
Fifteen years’ experience in design, development, implementation, optimization, and leadership of large-scale corporate actions to improve capability, quality, productivity, and efficiency, with significant cost savings realized through expertise in:
LEADERSHIP
Project Management
Conflict Resolution
Risk Assessment (FMEA)
Change Control Management
Strategic Partnership
Budget Planning
Technical Roadmap Planning
Coaching & Performance Management
PROFESSIONAL PROFICIENCY
Statistical Methods
(DOE, ANOVA, SPC, MVT, Sampling)
Problem Solving
(8D, Fault Tree, Route Cause Analysis)
Close Loop Control Systems
(SISO, MIMO, FF, FB, FF-FB)
Data Mining & Advanced Analysis
Filtering & Optimization
(EWMA, RMSE)
Six Sigma Process Control
(DMAIC, PDCA)
SOFTWARE
JMP
MATLAB
AutoCAD
MS Project
VISIO
MS WORD
EXCEL
SAS
SQL
Professional Experience
QIMONDA, (FORMERLY INFINEON AND WHITE OAK SEMICONDUCTOR)
Sandston, Virginia 1999- February, 2009
Global DRAM manufacturer for computing, graphics, consumer, mobile computers, and cellular applications, with more than 13,000 employees worldwide
Senior Staff Engineer
Technical Lead - Metrology & Imaging Process Control 1999-February 2009
Capital Equipment Leadership
Planned, organized and performed capital equipment evaluation for automated Scanning Electron and Optical Microscopy systems.
Generated Commercial and Technical procurement specifications and influenced global purchasing strategy for production measurement systems.
Negotiated technical and commercial contracts with capital equipment suppliers offering continuous and joint development commitment to form strategic partnerships and leverage competitive service and equipment pricing.
Data Analysis / Process Control Systems
Employed automated SQL scripting for data-mining with filtering, normalizing, correlation, statistical analysis and predictive modeling generated through JMP, SAS and Matlab scripts.
Documented and designed process and system flows, work methods, Corrective and Preventive Action (CAPA), Process Control and Quality Plans with VISIO and MS Word.
Developed and deployed automated control systems across multiple process areas and manufacturing facilities with significant gains in Process Capability demonstrated through automated tuning of machine variables such as; volume gas flow, step times, exposure energy, image focus, and positioning.
Project Management / Lean – Six Sigma Continuous Improvement
Lead Six Sigma Black Belt (SSBB) projects employing cross functional teams and Value Steam Mapping techniques to drive Continuous Improvements with benefits realized in equipment and process productivity and capability. Strategic projects minimized process faults and defects though statistical monitoring of machine sensors, process timing and product measurement / inspections.
Major Lean Six-Sigma Project accomplishments
• $6 million annual revenue increase and $1.2 million in capital cost avoidance realized through implementation of Dynamic Sampling.
• $15 million annual revenue increase through reduced scrap and improved product yield upon implementation of Automated FF-FB MIMO control system.
• $2 million annual revenue increase through implementation of model based metrology (Predictive Overlay) and Inter-process thin film / imaging control system to reduce Rework and Scrap.
Directed and supervised a team of senior and staff engineers, with emphasis on technical development, Performance Management, Key Parameter Improvement (KPI) tracking and continuous improvement reported in both quarterly cost savings and yearly return on investment.
Developed, trained and mentored technical staff in Work Methods, SPC, CAPA, Lean
Manufacturing and Project Management.
Leader for Infineon Technologies Process Automation Team, member of manufacturing
cluster Metrology Strategy.
SIEMENS MICROELECTRONICS – Semiconductors
East Fishkill, New York 1996 - 1999
DRAM Development Alliance with IBM and Toshiba
Process Development Engineer
Optical & Scanning Electron Metrology Applications
Developed Gauge Capable measurement methods for application in high volume manufacturing.
Delivered detailed technical documentation, reports and specifications as part of a consortium of companies (i.e., IBM Microelectronics, Toshiba & SIEMENS Microelectronics).
Issued Technical Roadmaps and strategic recommendation regarding metrology methods, apparatus and equipment for manufacturing application.
Worked closely with equipment vendors, performing negotiation influencing direction and specification adherence.
Designed and performed Supplier Quality Assessment (SQA), Best-of-Breed evaluation and Validation for manufacturing capital equipment including optical and SEM metrology systems.
CHERRY SEMICONDUCTOR – Semiconductor
East Greenwich, Rhode Island 1994 - 1996
Global manufacturer of Automotive ICs, keyboards, sensors with 14,000 employees worldwide
Equipment Maintenance Technician
Photolithography manufacturing
Performed preventative and corrective equipment maintenance for lithography processing systems.
Designed and installed custom exhaust/drain manifold on refurbished SSI 6” wafer coater
systems improving area productivity, process capability and reducing maintenance cost.
Education
Vermont Technical College: AS Mechanical Engineering
CERTIFICATIONS
ASQ CQM – expected exam completion – July, 2009
PMP – expected exam completion – Fall, 2009
Publications / Patents
US Patent No. 7,358,493, “Method and Apparatus for Automated Beam Optimization in a Scanning Electron Microscope,” Granted April 15, 2008.
US Patent No. 7,184,853, “Lithography method and System with Correction of Overlay Offset Errors Caused by Wafer Processing,” Granted February 27, 2007.
US Patent No. 6,727,989, “Enhanced Overlay measurement Marks for Overlay Alignment and Exposure tool Condition Control,” Granted April 27, 2004.
US Patent No. 6,463,184, “Method and Apparatus for Overlay Measurement,” Granted October 8, 2002.
Advanced Process Control Applied to Metal Layer Overlay Process, SPIE 2004
Novel implementations of scatterometry for lithography process control, SPIE 2002
Advanced Process Control: Benefits For Photolithography Process Control, ASMC 2002
Gauge control for sub-170-nm DRAM product features, SPIE 2001
Advanced Process Control: Basic Functionality For Lithography, ASMC 2001
Deciphering and encoding product overlay: hidden errors, SPIE 2000
Pattern placement errors: application of in-situ interferometer-determined Zernike coefficients in determining printed image deviations, SPIE 2000
Results of AEC/APC Deployment at White Oak Semiconductor, AEC/APC symposium XI, 1999
Overlay Measurement Technique Using Moiré Patterns, 20October 1997
Enhanced Overlay Measurement Marks for Overlay Alignment and Exposure Tool Control, 15February 1999
Method for Direct Overlay Measurement of IC Device Features, 23March 1999
Across Field Overlay Variation (AFOV) Compensation for Semiconductor Devices, 18September 1999
Comparison of optical, SEM, and AFM overlay measurement; SPIE 1999