Engineer Design

CURRICULUM VITAE

Personal details:

Name : Tomasz Olewinski

Date of birth: 30.04.1982

Address: Apt 3A, An Dun, Church Rd, Raheen, Limerick, Ireland

Phone number: +353-**-**-**-***

e-mail: **************@**.**

Talented, performance-orientated professional with experience in both microcontrollers and IC R&D industry. Open-minded, hard-working team player with excellent communication skills, attention to detail and analytical approach. Flexible, enthusiastic and proactive in suggesting solutions and improvements. I have a thorough knowledge of IC validation, problem solving and a clear vision of goals. I am computer skilled including, Microsoft Office Package, statistical analysis, graphical presentation and data handling.

Education:

2011 – 2013 University of Limerick, Limerick, Ireland

Department Electronic & Computer Engineering

Master of Engineering in VLSI systems

2002 – 2007 Wroclaw University of Technology, Wroclaw, Poland

Department Electronics

Master of Engineering in Electronics

1997 – 2002 Secondary School in Praszka, Poland

Specialization: Electronics

Trainings and awards:

2011 - 2012 ON Semiconductor uLead training – European high potential program

2011 – 2012 ON Semiconductor Emerging Leaders Program – global training for high potentials

2010 National Instruments - LabView Core2 course

2010 National Instruments - LabView Core3 course

2010 National Instruments - Data Acquisition course

2009 University of Cambridge – First Certificate in English FCE

2009 ChipRight – Verilog Quick Start course

2008 National Instruments - Certify LabView Associate Developer CLAD

2007 Soft Test – Fundamentals of Mixed Signal Testing

Experience:

09.2011- now – ON Semiconductor

Position: Staff Design Evaluation Engineer.

• Pre-Silicon verification of the design using simulation tools and FPGA with Verilog coding.

• Development of mixed signal measurement techniques.

• PCB Design, including PCB layout, to allow identified measurements and characterization to be made.

• Labview software development to supply stimulus, capture & process responses from the device using both National Instruments PXI system and GPIB instruments.

• Debug of silicon issues to root cause.

• Generation of reports on silicon performance for the new product development team.

• Project supervising, technical leading.

• Leading a group of engineers working on a project.

• Mentoring engineers and students.

• Ongoing, active improving procedures in a design evaluation department.

• Maintaining and managing a LabView code in design evaluation department.

01.2008- 09.2011 – ON Semiconductor

Position: Senior Design Evaluation Engineer.

• Pre-Silicon verification of the design using simulation tools and FPGA with Verilog coding.

• Development of mixed signal measurement techniques.

• PCB Design, including PCB layout, to allow identified measurements and characterization to be made.

• Labview software development to supply stimulus, capture & process responses from the device using both National Instruments PXI system and GPIB instruments.

• Debug of silicon issues to root cause.

• Generation of reports on silicon performance for the new product development team.

• Project supervising, technical leading.

• Mentoring students.

• Maintaining and managing a LabView code in design evaluation department.

07.2007- 12.2007 – Analog Devices

Position: Design Evaluation Engineer

• Pre-Silicon verification of the design using simulation tools.

• Development of mixed signal measurement techniques.

• PCB Design to allow identified measurements and characterization to be made.

• Labview software development to supply stimulus, capture & process responses from the device.

• Debug of silicon issues to root cause.

• Generation of reports on silicon performance for the new product development team.

09.2006- 07.2007 – Contrans TI

Position: Software Engineer

• Bench PCB debugging, including extensive soldering, multimeter and oscilloscope usage

• Project feasibility analyze

• Design of commercial software for TI MSP430

• Project documentation, including a code description

Language:

Polish: Native

English: Fluent in writing and speaking, FCE certificate

Skills:

• LabView

• HPVee

• Verilog

• C++

• PADS Logic

• PADS Layout

• Protel

• Altera - Quartus

• Cadens

• PSpice

• uVision

• Code Composer Studio for MSP430

• AVR studio

• MS Office

• PCB design, including PCB layout

• Design bench debugging

• Manual skills, including soldering

• Multitasking, time management, tasks prioritizing

• Development and execution of validation test plans, designing test boards and validation reports

Additional skills:

Full driving license

Interests and activities:

Keeping informed with innovations, book reading, swimming, hill walking, VP of UL KravMaga student sport club

References:

To be provided upon request

Website:

http://www.linkedin.com/pub/tomasz-olewinski/31/729/71a

Contact this candidate