Edge AI Computer Vision Engineer

HIEU HUNG LE

Edge AI & Computer Vision Engineer On-Device Inference · PyTorch · TensorRT · C++/Python Ho Chi Minh City, Vietnam · *************@*****.*** · +84-914-***-*** linkedin.com/in/lehieu1503 · github.com/lehunghieu1503 · tinkerlog.io.vn SUMMARY

Computer vision engineer with 4+ years of production C++/Python on Linux, taking vision models from prototype to shipping ADAS and robotics products (VinFast, VinRobotics). Trains and fine-tunes models in PyTorch (CNN detectors, lane and keypoint models, CLIP), using synthetic data generated in simulation when real labels are scarce. Specialized in edge deployment: profiling latency bottlenecks, INT8/FP16 quantization with per-layer sensitivity analysis, and conversion to TensorRT, ONNX Runtime, TFLite, OpenVINO and TI TIDL on NVIDIA Jetson, ARM SoCs and NPUs within tight compute and power budgets. Built multimodal search over video events with a fine-tuned vision-language model. Results: 182 FPS YOLO11s at 14 W on Jetson Orin Nano, 2x inference throughput from GPU pre-processing, CPU load cut from 209% to 70% with zero-copy decode.

TECHNICAL SKILLS

Languages: Python, C++ (11/14/17), CUDA C++, C, Bash Deep Learning & Vision: PyTorch, torchvision, Ultralytics, open_clip, OpenCV; CNNs (ResNet, YOLO11/YOLOv8/YOLOX, pose/keypoint heads), transformer-based vision-language models (MobileCLIP2), lane detection (UFLD, CLRNet), multi- object tracking (ByteTrack, Kalman filter)

Data-Centric ML: Synthetic data generation in CARLA (auto-labelled images, randomized weather and time of day), dataset curation, train/val/test discipline, evaluation (mAP, Recall@K, nDCG, pixel/metric error) Edge Deployment & Compression: TensorRT (native C++ API, FP16/INT8/FP8, Q/DQ), ONNX / ONNX Runtime, TFLite

(LiteRT), OpenVINO + NNCF, TI TIDL; post-training quantization (NVIDIA ModelOpt, ORT), mixed precision, per-layer profiling (trtexec), latency/power budgeting (FPS/W) Multimodal Search & LLM: CLIP contrastive fine-tuning, Faiss (Flat/HNSW), LightGBM LambdaRank re-ranking, retrieval- augmented answers with local LLMs (llama.cpp, Qwen2.5) Hardware Targets: NVIDIA Jetson AGX Orin / Orin Nano (L4T/JetPack), TI AM62Ax (C7x/MMA NPU), Intel NPU

(OpenVINO), ARM Cortex-A, x86 + NVIDIA RTX

Video & Systems: GStreamer, NVDEC/NVENC (H.264/H.265), zero-copy buffers (NVMM/EGLImage, shared memory), multithreading, Linux, Docker, ROS 2, FastAPI, MQTT, SQLite Engineering & Tools: CMake, GitHub Actions CI, pytest, AddressSanitizer/ThreadSanitizer, GDB, perf, Prometheus/Grafana, Ansible, QEMU/KVM; automotive: AUTOSAR, ISO 26262, UDS/DoIP PROFESSIONAL EXPERIENCE

VinRobotics 06/2026 – Present

Robotics Systems Engineer Hanoi & Ho Chi Minh City Jetson AGX Orin (L4T r36.4) · C++/Python, ZED SDK 5.x, TensorRT, ONNX, NVENC, ROS 2 Humble, CycloneDDS, iceoryx, Docker, Ansible, QEMU/KVM

Robot Perception Platform – Multi-Camera Stereo Vision on NVIDIA Jetson AGX Orin On-Device Vision Models: Deployed TensorRT-accelerated neural stereo depth and custom YOLO ONNX object detection (TensorRT engines, per-class confidence thresholds, 3D object tracking) for 3 stereo cameras on one SoC. Compute & Power Budgeting: Profiled and shared GPU, video encoder and memory bandwidth between depth inference and H.265 streaming using FPS capping, downscaling and resolution profiles to hold real-time rates. Camera & Image Quality: Brought up 3 GMSL2/MIPI CSI-2 stereo cameras and tuned ISP parameters (exposure, gain, anti-banding, denoising) for model input quality; camera health monitoring with auto-restart. Zero-Copy Data Path: Delivered frames to vision consumers without copies using iceoryx shared-memory pools, CycloneDDS shared memory and ROS 2 intra-process composition. Robot OTA Release & Deployment Platform (main owner) Designed and built the platform that ships containerized robot software, including AI model components, to a two-PC robot (x86 + Jetson): one checksummed release package, offline or SSH deploy, lockstep apply with runtime health checks and automatic rollback.

Added udev-driven device hotplug and real-time CPU isolation checks; validated on a QEMU/KVM two-VM test bench with emulated devices, network cuts and reboots.

VinFast 03/2025 – 06/2026

Senior C++ Embedded Software Engineer – ADAS Embedded Team Hanoi & Ho Chi Minh City TI AM62x / AM62Ax (Cortex-A53, C7x/MMA NPU) · C++, Python, ONNX, TIDL, ROS 2, CARLA, Adaptive AUTOSAR L2 Project – Front-Camera Perception (object & lane detection for ACC / LCC / AEB) Model Selection for Edge: Evaluated YOLOX-Nano, YOLOv8n, YOLOPv2, UFLDv2 and CLRNet on the target by latency, GMAC, quantizability and memory footprint within a ~2 TOPS NPU budget and a 20–30 FPS goal, not by PC accuracy alone.

NPU Deployment & Quantization: Converted ONNX detection and lane models for the C7x/MMA accelerator with TIDL; resolved unsupported operators and CPU fallbacks, checked INT8 accuracy and matched PC reference outputs on target. Vision Pipeline: Built the 8 MP camera-to-tensor path (ISP, lens-distortion correction, resize, normalization, tensor layout) and mapped detections to vehicle coordinates with intrinsic/extrinsic calibration. Post-processing & Tracking: Implemented output decoding, confidence filtering, NMS, letterbox restoration, lane geometry validation and Kalman-filter tracking with timestamp-aware prediction. Profiling: Found bottlenecks by splitting latency per stage against CPU, NPU and DDR bandwidth load; quantified the inline DDR ECC cost (10 to 8 FPS) as a safety/performance trade-off. Production Robustness: Root-caused thermal and LDC watchdog failures from DLT logs; added freshness, plausibility and E2E checks with degraded states so controllers never act on stale or invalid perception. L2 Projects – FOTA System & ADAS HIL Platform

FOTA: re-engineered the installation pipeline for a 3x speedup (15 to 5 minutes) and cut CPU usage by 75% with event- driven coordination; Cortex-A53/R5F messaging over RPMsg, UDS over DoIP. HIL: built a ROS 2 C++ bridge between front-camera perception and CARLA to test ACC, LKA, AEB and LCC within a 20– 30 ms latency budget.

LG Electronics Development Vietnam 04/2024 – 03/2025 Software Engineer – Adaptive AUTOSAR Team Hanoi

Developed low-latency C++ IPC middleware on embedded Linux for service-oriented systems; represented LG Electronics in the AUTOSAR Consortium (WG-IVC-AP, WG-AP-CCT).

Bosch Global Software Technologies 10/2022 – 03/2024 Embedded Software Engineer Ho Chi Minh City

Developed Classic AUTOSAR communication-stack components for automotive ECUs; on-target JTAG debugging and MC/DC unit testing.

PROJECTS

Edge Perception & Video Analytics Stack github.com/lehunghieu1503/cpp-realtime-video-analytics PyTorch, C++17, CUDA, TensorRT, ONNX Runtime, OpenVINO, TFLite, YOLO11, MobileCLIP2, Faiss, LightGBM, llama.cpp, ByteTrack, CARLA, Docker

Synthetic Data & Training: Built CARLA pipelines that generate auto-labelled datasets (lanes, parking stalls, CCTV events) under randomized weather and time of day; trained a UFLD ResNet-18 lane model and a YOLO11-pose stall/keypoint model in PyTorch, then drove a car on them in closed loop (lane found in 100% of frames, 5/5 autonomous parks). Vision-Language Search: Fine-tuned MobileCLIP2 with a contrastive loss on event crops (nDCG@10 +17% over zero- shot) for natural-language search in English and Vietnamese; Faiss retrieval, LightGBM LambdaRank re-ranking and grounded answers from a local LLM.

Compression: Produced FP16, INT8 and FP8 models (TensorRT Q/DQ via ModelOpt, OpenVINO NNCF, TFLite); used per-layer sensitivity analysis to keep sensitive layers in higher precision, and shipped FP16 where INT8 broke CLIP embeddings.

Edge Performance: YOLO11s INT8 at 182 FPS / 5.5 ms on Jetson Orin Nano Super at 14 W; CUDA pre-processing kernel doubled throughput; zero-copy hardware decode cut CPU load from 209% to 70%. Production Engineering: One C++ pipeline over TensorRT, ONNX Runtime and OpenVINO CPU/GPU/NPU, with tracking, zone events over MQTT, metrics, ASan/TSan CI and hardware-in-the-loop tests. EDUCATION & CERTIFICATIONS

B.Eng. in Automation and Control Engineering Technology – HCMC University of Technology and Education 2018 – 2022 TOEIC 905 (2024)

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