Platform Validation Engineer
Resume:
Abin (Abe) Chand ********@********.***
Elk Grove, CA
linkedin.com/abin-chand
Platform Validation Engineer Testing Analyst
Post Silicon Platform Development Hardware Validation Information Technology
Asset Procurement and Property Control
Summary
Engineering professional with extensive experience in Post Silicon Validation, hardware development, testing, and Adept at troubleshooting complex hardware and software systems. Skilled in test plan/test case creation, systems maintenance, board assembly, L2/L3 technical customer support, asset lifecycle management, and procurement. Proven ability to thrive in fast-paced high-pressure environments, adapt to changing priorities, and deliver high-quality, customer-focused solutions. Strong leadership and strategic planning expertise with a track record of driving performance and achieving exceptional results under tight deadlines.
Work History
Intel Corporation, Folsom, CA (09/2016 – 11/2024)
Post Silicon Validation Engineer / Testing Analyst
• Spearheaded a team of 5+ Field Engineers in developing comprehensive test plan for Intel products, executing tests in alignment with plan and test cases, as well as deployment, troubleshooting, improved production processes, enhanced inventory management, resolved complex technical challenges, optimized workflows, and ensured on-time delivery, achieving project milestones within 12 months and earning a promotion to Technical Team Lead.
• Collaborated with Project Managers to plan the launch of new Intel products by gathering and analyzing Software Requirement Specifications (SRS), reviewing and creating comprehensive test cases derived from the SRS, ensuring full requirement coverage through traceability, executed tests, logged and retested defects, and supported deployment to ensure all requirements were met, resulting in significant supply chain efficiencies and substantial increase in product and hardware for release.
• Contributed to the development of test plans based on assigned tasks, tracked test coverage, reduced defect density, and other metrics, while published progress reports; provided failure reports and testing methodologies for New Product Inspection.
• Optimized test plans and cases to improve testability to reduce risks; collaborated with cross- functional teams to review requirements, resolved issues; and ensured compliance with vendor and Intel standards.
• Collaborated with project management to successfully launch the new products on a large scale by coordinating production planning, testing, and assembly. Oversaw lab operations, including deployment testing procedures, debugging, and performing root cause analysis. As a subject matter expert, I managed complex system upgrades throughout the business units, guaranteeing the deployment of high-quality systems into production environments for international clients worldwide. In addition to working with design and development teams to prioritize user acceptability testing for production releases, I oversaw triage efforts for IT system failures, deployed technological enhancements, and administered change requests.
• Conducted systems analysis and troubleshooting for Intel’s next-generation design test chip platform, identifying and resolving a critical mechanical issue mitigating test module failures; collaborated cross- functionally with mechanical, silicon package, and board design teams to document test data, analyze root causes, made recommendations to implement permanent fix, improving system efficiency, prepared specifications, ensuring alignment with user functionality and organizational requirements.
• Performed system maintenance, monitor and troubleshoot customer systems; applied upgrades, manage patches, and resolve variances. Documented activities tracked tasks in ServiceNow/HSD and created guides to standardize processes and enhance knowledge sharing. Ensured project development demonstrates alignment with our Intel IT Strategic Plan goals: People First, Trusted Partner in Transformation, Strengthen Stewardship & Gain Efficiencies, and Enhance Security & Connectivity.
• Streamlined IT operations with asset lifecycle management by tracking, monitoring, and auditing lab computer hardware and software, ensuring departmental compliance, reducing errors by 15%, and increasing operational efficiency by 20% through meticulous documentation and adherence to safety and quality control protocols.
Field Support Engineer Technician 06/1999 – 09/2016
• Designed, developed, tested, and deployed 150-200 test chips each project, MDV platforms, and around 1,000 PCIe cards, consistently delivering ahead of schedule. Utilized cutting-edge testing procedures and equipment to ensure system availability, resulting in a 95% debug yield.
• As Field Technical Lead, I oversaw global One Stop Shop teams across Intel campuses worldwide, enabling new silicon power-on laboratories and implementing through system testing for mobile, server, and desktop platforms.
• Implemented FAI (First Article Inspection) to increase Power-On efficiency by 20%, eliminate failures, and ensure zero customer issues. Led global teams, trained stakeholders, and delivered user guides for new Chipset silicon.
• Successfully validated and deployed 150 to 250 systems per project of P6 microprocessor globally. I consistently delivered ahead of schedule by debugging hardware, installing test software, and conducting QC/QA testing to meet Power-On targets.
• Developed Lakewater debug interface to address PCH pre-silicon difficulties and boost PCB functionality. Improved system yield and debugging efficiency through team training and process enhancements.
Hard Skills
• Technical Skills
• Hardware Programming
• Communication skills
• Project management
• Working under pressure
• Debugging
• Inventory Management
Soft Skills
• Work Ethic / Leadership
• Time Management
• Teamwork / Team player
• Collaboration
• Willingness to learn
• Customer Service
• Critical Thinking
IT Skills
• Communication
• L2 & L3 Tech Support
• Trouble shooting
• Software installation
• Hardware setup
• Peripheral setup
• Cross-unit Coordination
Education
Associate’s degree - Computer & Electronics Technology Heald Institute of Technology, San Francisco, CA
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