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Quality Engineer Clean Room

Location:
Riverside, CA
Salary:
150000
Posted:
March 19, 2023

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Resume:

Martin Solano

**** ****** ***

Riverside Ca. ****4

adv0n9@r.postjobfree.com

714-***-****

OVERVIEW EXPERIENCE AND PROFESSIONAL SKILLS

Reliability Quality Engineer in the semiconductor field. Implement reliability qualification programs from device to system level including test equipment design, set-up verification and execution of qualification tests. Knowledge and experienced with AEC Q100 Automotive, TelCordia, JEDEC, Mil-Standard 883E, Energy Star and UL stress driven tests for qualification.

Skyworks Solutions - Irvine, California, 2018-Present

Reliability and Failure Analysis Staff Engineer

·Responsible for RF product and component qualification, planning, execution and reporting documentation in agile. Extensive reporting, weekly slides and reports to upper management.

·Program managing the stress test execution of company’s product and component qualifications.

·Bringing up analog/RF HTOL life test modules, reliability hardware for HAST, and ESD.

·Program managing FA and corrective actions (ICAR) Experience in reliability failure modes of packaging technologies and fail mechanisms.

·Working with suppliers in packaging, assembly, test and ORT monitoring for company’s qualifications.

·Support sales and marketing team with RMAs implementing ongoing quality improvement processes.

Qualcomm Technology - San Diego, California, 2016-2018

Senior Reliability Engineer III

·Responsible for the qualification of Qualcomm’s automotive FCBGA FinFet device using 14nm Fab Technology.

·Responsible for the qualification of PMIC WLP Die using 0.180um fab technology. This PMIC power management IC device is a chipset of the FCBGA device for automotive qualification.

·Manage Product, Package reliability test tracking using internal reliability database on a regular basis for commercial and automotive applications.

·Coordinated automotive grade 3 product and package testing activities overseas and with local labs.

·Assisted in preparing and calculating DPPM Reliability assessments for warranty periods based on HTOL and ELFR data.

·Recognized for finding issues on the MCC burn in boards and following up with a corrective action plan.

·Wrote MCC HTOL and HAST test setup procedures for internal and external labs.

Switch Lighting Co. - San Jose, California, 2010-2015

Reliability Engineering Test Lab Manager

·Managed, developed and executed Reliability Stress Plans for all phases of qualifications per Energy Star requirements.

·Performed failure analysis and corrective action for internal reliability failures.

·Compiled, compared and analyzed photometric data to monitor and study life cycle trend.

·Developed LED test protocols to meet Energy Star standards and customer satisfaction.

·Designed and implemented Switch’s test methodology to test upper and lower assembly.

·Managed technicians and trained them to the principal guidelines and technical aspects of Switch’s product spec and provided guidance support.

·Report, update and manage product data for reporting purposes to upper executive board members.

·Hands on experience and operations of photometric spectrometer sphere tester

Conexant Systems Inc., - Newport Beach, California, 2000-2009

Reliability Engineer:

·Manage and develop Reliability Stress Plans for company product.

·Experience with digital and mix signal products that include the Digital Spread Spectrum Cordless, VoIP Phone & WiFi, Broadband ADSL/USB/Ethernet modem, Wireless Network Processor, USB digital speaker, Audio mixed signals product line, and also the 90nm digital single function and MFP imaging products.

·Interface with manager and external laboratories to conduct package qualification. Support all business divisions and conduct internal qualification tests for company products. Interfaced with external test laboratories to set-up qualifications tests, and acquire test results. Support Customer Quality and Failure Analysis group with Customer Returns, internal issues and continual improvements.

·Maintained all phases of reliability equipment including AEHR ovens, temperature cycling system, PGC moisture chambers, and Hast systems.

·Able to DE capsulate device packages in order to expose die using nitric/sulfuric acid for failure analysis. Managed HBM, ESD, CDM and Latch Up testing for responsible projects..

·Performed HTOL bench confirmation and verification.

·Responsible for first article design of HTOL boards and conversion of stimulus vector patterns to provide maximum test coverage.

Reliability Engineering Tech:

·Performed and maintained environmental testing per Plans developed by Engineer

·Operated burn in ovens, HAST test systems, preconditioning ovens, temperature cycling ovens, HTS and reflow ovens.

·Performed final ATE test on completed reliability qualifications.

Rockwell Semiconductors, - Newport Beach, California, 1995-2000

Lead Wafer Probe Tester/Technician

·Maintained wafer test probe test systems to perform functional test on die before wafer is sent for preparation.

·Trained and qualified operators on operations and safety aspects of the Wafer Test Prober.

·Performed final visual inspections.

·Knowledge of Promise database.

Fab Operator

·Worked in Clean Room Environment

·Operated equipment to fabricate wafer die in the areas of diffusion, etch and photo. Executed programs, performed daily calibrations and maintained daily production log results.

EDUCATION

·Bachelor of Science in Electrical Engineering; Southern California Institute of Technology, 2004

·DeVry University, Pomona Ca. 2001

OTHER RELEVANT TRAINING

Technical Writing, Analog and Digital Communication systems, LAN/WAN Systems, Microprocessors, AC/DC Circuit Analysis, De-capsulation of Microchips, Reliability Testing

Additional Training: Semiconductor Technology course, ABC Wafer Manufacture and Design/RELEX software Training Greensburg, PA.



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