System Engineer Shri

Maitreyee Chandekar

Dedicated individual; targeting assignments in SYSTEM ENGINEER with an organization of repute

Contact

******************@*****.***

+91-915*******

linkedin.com/in/maitreyee-

chandekar-145912136

Knowledge Purview

Agile Methodology

SDLC and STLC

Software Testing

Automotive Domain Knowledge

Technical Skills

Languages: SQL, C, Python

Web Technologies: HTML 5, CSS

Databases: MySQL, Data Warehouse

Operating System: Windows

Tools: API Testing using POSTMAN

Basic Understanding of Cloud

Computing, API, web services

Soft Skills

Communication

Team Player

Interpersonal

Collaborator

Adaptable

Profile Summary

A competent entry level professional in M.Tech. in VLSI Design from Shri. Ramdeobaba College of Engineering and Management, RTM Nagpur University Retaining insightful knowledge of the academic concepts such as Placement Management Software, Coding and their applicability in various domains Skilled in languages like Python, HTML, SQL, and so on Effective in interacting with users for requirement gathering C and C++ from Disha Institute, Nagpur

Energetic personnel, initiating to prove the savviness at various projects; capabilities in grasping new technical concepts quickly & utilizing them in a productive manner An effective communicator with strong relationship management and analytical skills

Academic Details

2020: M.Tech. (VLSI Design) from Shri. Ramdeobaba College Of Engineering and Management, RTM Nagpur University with 7.61 CGPA

2018: B.E. (Electronics & Telecommunication) from Rajiv Gandhi College Of Engineering and Research, RTM Nagpur University with 7.3 CGPA 2014: 12th from Somalwar High School, Nagpur with 65% 2012: 10th from Somalwar High School, Nagpur with 85% Internship

RRCAT, Indore

Period: July ’19 - July ‘20

Designation: Trainee

Project: Simulation Studies of Wet Chemical Etching for the fabrication of Vertical-Comb- Drive micro actuators

Academic Projects

Title: Study and Development of Process Parameters of 1-D Vertical-Comb-Drive for Micromirror Application

Period: January ‘19 - June ‘19

Title: Sub-Threshold Amplifier with its Layout Design Period: January ’18 - June ‘18

Title: Broken Wire Detector

Period: June ’17 - June ‘18

Paper Publication

Title: Story of Moore's Law

Dated: 4th April, 2019

Impact Factor: 7.211

International Research Journal of Engineering and Technology (IRJET) Journal Volume 6 Personal Details

Date of Birth: 17th June, 1996

Languages Known: English, Hindi and Marathi

Address: 23, Nrusimha Krupa Paradise Colony, Sonegaon, Khamla, Nagpur- 440025, Maharashtra

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