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Nitin Srimal Phone : 91-934*******

SUMMARY

Strong interest and background along with strong leadership experience in engineering, software and semiconductors.

Founded a company for creating, building and exploring immersive online experiences through AI (Artificial Inteligence) and AR (Augmented Reality).

Prior professional experience at INTEL Corp, IBM and Sasken working on leading edge technologies.

Highlights of career includes working on the design and development of the landmark 1 Ghz (gigahertz) Pentium® III (Cumine), and Xeon™-2M (Cascades) microprocessors at INTEL Corp.

At INTEL Corp. worked on the development and deployment of methods for design convergence of complex X86 CPUs/microprocessor designs.

At Texas Instrument Corp. optimized the development of software solutions for TI’s proprietary ecosystem. At Sasken Technologies, collaborated with design teams in managing the development of multiple SoC products ranging in application from telecommunication (Mobile TV) to Video processing.

Multi-cultural teams and multi-site development experience including working with worldwide teams over several years. Experience in coordinating with worldwide design and development teams and with internal/external developers/vendors for design goals.

Good experience with Industry standard design tools and technology. WORK EXPERIENCE

ENTREPRENEUR 2016 -Present

Worked on conceptualization, product definition and product management of a few exceptional software/hardware products with the potential of becoming the core of phenomenal high-tech startups with strong technological underpinnings.

Founded a company for creating, building and exploring immersive online experiences through AI (Artificial Inteligence) and AR (Augmented Reality). Building a B2B SaaS software development business.

Taking the business from ideation to product launch in under an year.

IBM INDIA 2011-April 2016

Work with management in building engineering teams and in providing leadership to the project development teams.

Collaborated with large worldwide project engineering teams in the development of IBM systems, technology solutions and engineering methods.

Initiated and managed deployment of design methodology with worldwide customers.

Provided training for IBM as well as IBM Design Customers.

Strategized on team development and identified competitive services and opportunities for innovation.

Faculty BITS-Pilani / Design Consultant 08-11

Sasken Communication Technologies 06-08

SoC (System on Chip) development projects including video processing SoCs in current technology nodes. (for real-time multi-standard HD video encoding and decoding) and mobile TV SoC designs ( DVB-T and DVB-H standard ) in low power technologies.

Collaborated with the design teams in managing the development of these SoC products.

Team building and fostering technical innovation. Texas Instrument Corp 04

Provided leadership to a team of several engineers in the development, support and optimization of software solutions for TI’s proprietary ecosystem.

Including driving the development of software solutions for TI’s proprietary ecosystem

(i.e. conceptualization, design and deployment).

INTEL Corporation 99-03

At INTEL Corp. worked with the project engineering teams on the development and deployment of complex X86 CPUs/microprocessor such as the Pentium-III and Xeon microprocessors at > GHz design targets.

Collaborated with large worldwide Research & Development teams in the design and development of engineering methods, technology solutions for the design of complex microprocessors products.

Provided training for INTEL project engineering teams.

Developed specifications, parameters and analyzed and evaluated design-tool capabilities significantly improving efficiency and design productivity.

EDUCATION

Bachelor of Engineering 96 University of Pune, India

Master of Science 99 University of Massachusetts, USA

PUBLISHED WORK

US PATENTS

Statistical Path Tracing in Timing Graphs. Proceedings of the IEEE/ACM Design Automation Conference DAC Texas USA -2016

Statistical Path Tracing in Timing Graphs. ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems TAU CA, USA 2016

Methodology to ensure circuit robustness and quality while proliferating high performance designs across process revisions with high productivity. Proceeding of IEEE conference ISQED 2010 CA, USA.

SNUG 2006 Complexities in timing analysis – Managing uncertainties.

Best Paper Award in IBM worldwide EDA conference for

“HATS: Hierarchical timing methodologies for large Application Specific Chip designs in advanced technologies”

Book Chapter, in Lecture Notes in Computer Science 99 published by Springer- Verlag. The same also published in the scale space conference in Corfu Greece in Sept. 1999

ACHIEVEMENTS

INTEL Recognition Award for development of Dual L optimization flow.

Team Award for getting the landmark 1 GHz coppermine processor into production.

Several innovations in INTEL’s timing convergence methodology.

Best paper and presentation award in IBM worldwide EDA conference.

Invited Seminar at IBM world-wide EDA Seminar series on hierarchical design methodologies.

SKILLS

Semi-conductors, Innovation, Technical leadership, Product Definition, Team-building, Product Management, Agile Methodologies, Cost-planning, Working with geographically dispersed and culturally diverse teams, AI, AR (Augmented Reality), Mobile software development for the web and for Android and Apple IOS devices, Web technologies.

OTHER INFORMATION

Love traveling

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