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Electrical Engineer Design

Location:
Quincy, MA
Posted:
March 01, 2021

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Resume:

Xiyang Chen

*** ***** ****, *** ****, Quincy MA *2169

adkj60@r.postjobfree.com +1-617-***-****, Available as soon as possible. Education

Northeastern University, Boston, MA

Master of Science in Electrical Engineering GPA: 3.52 Dec 2019 Concentration: Microsystems, Materials and Devices Courses: Analog IC design (OP741 amplifier final project), Introduction to MEMS, CMOS Analog IC (bandigap vol. ref. final project), VLSI design (Booth multiplier final project, digital IC), Computer Vision (rewriting CM tracker and other basic graphic processing.), Data Visualization(Python Natural language processing final project, Matlab data visualization), Mixed Signal IC circuit and design Shanghai Jiao Tong University, Shanghai, China

Bachelor of Science in Microelectronics, Electrical Engineering June 2017 Courses: Signals and Systems, VLSI design (with lab work), Computer Architecture (Verilog simulation of multicycle processor), Operating Systems, Mixed Signal Circuit Design, EDA Tool Development of Circuit Analysis, Probability and Statistics, Linear Algebra, Fundamentals of Multimedia, Semiconductor Physics and Devices Technical Skills

Computer Languages: C/C++, Python, Verilog

Computer Tools & Skills: Matlab, Visual Studio, Adobe PS PR&AE, IAR Embedded workbench, Cadence Virtuoso, PSPICE, Vivado, Modelsim, board level electronic board design, AutoCAD, Altium Designer, power management. Experimental Equipment: Analog EDA tools, Zedboard, Mentor Graphics PADS, Simplicity Studio 5. Tera Term. Work Experience

Becton & Dickinson, Andover, Massachusetts Electrical Engineer Contract Oct 2020 – Present

Diabetes Care PoC system, board level electronic R&D. Optical, Acoustic, Pressure, temperature sensor, power supply, Bluetooth R&D. • USB, UART, I2C interface. • Current Sensing, Motor Control. • LTSPICE, Altium, Simplicity. Atantares, Cambridge, Massachusetts Feb 2020 – Present

Electrical engineer for an NSF & NIH supported, SBIR funded multi-functional coagulation detection Point of Care medical equipment R&D program, board level R&D, NDA signed Medtronic, Littleton, Massachusetts Feb 2019 – Aug 2019 Coop on lab project for the Reverse power protection electronic board design

Completed wielding, analog electronic circuit design work, verification and testing to develop a reverse power protection board to protect the mobile CT machine from the reverse operating motor’s current. Heavy use of Oscilloscopes, Logic Analyzers and debug tools in the process. Deal with power supply and motor power digital signal control module to control the whole mobile CT machine.

Used LTSPICE to simulate the power protection modules in the circuit. Mentor Graphic PADS for PCB layout.

Cooperate with the principal engineer to compose the complex calculation documents for the circuit and test protocol documents needed for other test engineers or needed by company. Shanghai Jiaotong University, Shanghai, China June 2016 – July 2016 Internship on lab project for OLED9664 display driver redesign

Wielding, coding and design work to realize the signal docking and display output of display chip OLED9664 through SCM STM32, including the board wielding, layout design and code editing. Familiar with DBI, SPI.

Code editing work including a basic display function including images, words and emojis and clock application. Shanghai Integrated Circuit Research & Development Center, Shanghai, China Oct 2016 – Nov 2016 Software Engineer Internship

Used C++ coding to display and adjust images from raw camera data in Bayer Matrix format.

Arranged all the properties needed from Adobe DNG raw camera format.

Provided an example of a realization to display raw camera data. Project Experience

Shanghai Jiao Tong University, Shanghai, China Nov 2014 – Dec 2015 Shanghai Jiao Tong University Innovation Project: Algorithm used for video stabilization used on FPGAs

Studied multiple video stabilizing algorithms. • Coded the Matlab simulation part of the anneal algorithm.

Implemented part of the FPGA function of the video stabilizations.



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