Engineer Information Security

Raghavapurapu NagaVisali Mobile: +91-707*******

Email: **********@*****.***

PROFESSIONAL SUMMARY

• Solving the Escalated Bugs (core dump analysis, if require) with in time.

• Involving in designing, developing and testing the Application.

• Delivering/solving the Bugs/Application on time.

• Experience in NAS, SAN, C.

• Done certification on Dell ISM V4, Isilon Fundamentals and Automation practitioner.

• Enthusiastic about learning new concepts in emerging technology.

• Ability to work as a team member or as an individual and confident in serving the best results. EDUCATIONAL PROFILE

• M.TECH (Digital Electronics & Communication Systems) from JNTUK University with 77%.

• B.TECH (Electronics & Communications) from JNTUK University with 81%.

• Intermediate (MPC) from Amaravati Junior College with 91%.

• SSC from S.R.K.H high school with 85%.

EXPERIENCE

Worked as an Associate Consultant in Capgemini since December 2018 to December 2020. Project 1 :-

Client : Dell (India)

Duration : December 2018 to December 2020

Team Size : 6

Development Tool : Linux (CentOS)

Role : Escalation Engineer

Project Name : Fluid FS, EQL

Description : FluidFS is a single namespace/filesystem NAS solution makes multiple file system appear like a single file system to a client, could be used to overcome the limitations of a traditional file system. It removes the need of balance file system content, monitoring capacity usage and improves client efficiency. Roles & Responsibilities –

• Continues involvement in understanding the client issues/requirements in order to solve them through logs/case reproduce, with a client satisfaction in a fruitful manner with in SLA.

• Direct Interaction with Clients or other cross teams to understand their requirement, challenges (if require).

• Debugging/core dump analysis of the code/logs for fixing the bugs/issues Project 2:-

Client : Dell (India)

Duration : December 2018 to December 2020

Team Size : 4

Development Tool : Linux (NetBSD)

Role : Escalation Engineer

Project Name : EQL/PS Storage

Description : EQL is a PS Series storage SANs provide peer storage architecture comprised of one or more independent arrays. Each array contains its own controllers, cache, Storage, and interface ports grouped together, they can create one or more single instance storage pools. The capabilities of the PS Series solution are provided through a unique set of software and hardware capabilities that, when used cooperatively, can provide a full featured SAN solution. Roles & Responsibilities –

• Continues involvement in understanding the client issues/requirements in order to solve them through logs/case reproduce, with a client satisfaction in a fruitful manner with in SLA.

• Direct Interaction with Clients or other cross teams to understand their requirement, challenges (if require).

• Debugging/core dump analysis of the code/logs for fixing the bugs/issues. Worked as an Associate Software Engineer in Quick Heal Technologies since November 2016 to December 2018.

Client : Quick Heal Technology

Team Size : 3

Development Tool : Linux (CentOS)

Project Name : UTM

Description : Unified Threat Management is an approach to Information security where a single hardware Installation provides multiple security functions.

Roles & Responsibilities –

• Analysis, design and development of Linux based software applications

• Software development in Linux using C/C++/Scripting

• Unit testing, code coverage, peer code review, troubleshooting and debugging

• Coordinating with cross-functional teams, whenever required.

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TRAINING & CERTIFICATIONS

Done Dell Training in Fluid FS, EQL and certifications. Key Skills : Dell EMC SAN, NAS, Core dump Analysis, C, LINUX, SHELL SCRIPTING

Certifications : Dell ISM V4, Isilon Fundamentals, Automation Practitioner, Data Science, Agile software development

ACADEMIC PROJECT

• Project Title : Implementation and Analysis of Hybrid 1-Bit Full Adder by Comparing with Various MOS Logics.

• Platform : Tanner EDA.

• Description : Main aim of this project is implementation of 1-bit full adder using Different logics and using hybrid logic, analysis and comparison of output waveforms, power, delay and power delay product (PDP) of individual logics and hybrid logic.

DECLARATION

I hereby declare that all the details furnished above are true to the best of my knowledge and belief. Place: Bangalore R NagaVisali

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