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Engineering Assistant

Location:
Riyadh, Saudi Arabia
Posted:
October 01, 2020

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Resume:

Curriculum Vitae

Dr. T.S.GHOUSE BASHA

Mobile:+966-*********

Email: **********@*****.***

CAREER OBJECTIVE

To work in a professional environment where I can contribute myself and enrich my skills according to the latest technologies and to work towards achieving the organizational goals.

EDUCATIONAL QUALIFICATIONS

Course

BOARD/

Percentage

YEAR

BRANCH/

UNIVERSITY

SPECILIZATION

M.Tech

NAGARJUNAUNIVERS

81

2006

Microwave

ITY,GUNTUR

Engineering

Electronics&

B. Tech

J.N.T.UHYDERABAD

72

2002

Communication

Engineering.

I.P.E

Board

of

Intermediate

86

1998

Mathematics, physics,

Education [A.P]

chemistry

SSC

Board

of

Secondary

71

1996

Mathematics,Science,

School Education [A.P]

Social Studies

WORK EXPERIENCE

1)Worked as Administrative Manager at Basama Al khaleej from December 2019 to September 2020.

2)Worked as Professor in Electronics and Communication Engineering department, Sri Sai Institute of Technology and Science Rayachoti, Kadapa District, Andhra Pradesh from 05-03-2018 to 25-11-2019.

3)Worked as Professor in Electronics and Communication Engineering department in Malla Reddy Engineering College for Women, Hyderabad from 01-04-2017 to 27-12-2017.

4)Worked as Associate Professor and HOD for Electronics and Communication Engineering department in KORM College of Engineering, Kadapa from Sep23 2008 to 31-03-2017.

5)Worked as Assistant Professor in Annamacharya Institute of Technology and Sciences, Rajampet, Kadapa (Dist.), (A.P) from25 May 2006 to Sep22 2008.

6)Done full time project work at Defence Research and Development Laboratory [DRDL] at HYDERABAD, India during July 2005 to April 2006.

7)Worked as Assistant Professor in Moula Ali Engineering College, Anantapur (Dist.), (A.P) during 10-06-2002 to 18-09-2004.

I worked in different academic activities such as:

•Assistant Professor

•Associate Professor

•Head of the Department

•Professor

•College timetable convener

•University Affiliation process convener

•Member of college academic committee

•Member of Anti ragging committee

•Member of grievance committee

•Organized National Symposiums for three times as a Coordinator

•Organized Workshop for one time for faculty on Research Methodologies

Responsibilities:

•Following the university’s administrative policies, procedures, and business practices recommended in the Department Guide.

•Establishing a system of checks and balances, including segregation of duties, for all administrative functions.

•Providing a positive work environment to employees based on well-defined and communicated expectations for administrative and business processes.

•Ensuring that all departmental faculty and staff are fully aware of their obligations to comply with university policies and procedures.

•Ensuring that employees receive appropriate training and maintain the skills and knowledge necessary to carry out these functions.

•Establishing internal procedures to ensure that monitoring and oversight are ongoing.

Labs Conducted

1)Digital Signal Processing

2)Matlab

3)Electrical and Electronics

4)Computer communications

5)Microprocessor and Micro Controllers

6)Multisim

7)IT WORKSHOP

8)Microwave Engineering

9)Digital and Analog Communications

EXPOSURE TO SOFTWARE

Worked on Operating system: Windows 98, Windows 7, Windows Xp

Languages Aware of : C, VHDL, Mat lab R2011a

Assembly Language of 8086, 8085DSP programming : TMS320 DSK6713, Code Composer Studio

NUMBER OF PATENTS: 01

AN ARRANGEMENT FOR CULTIVATION IN A CHAMBER USING FUZZY LOGIC WIND INTELLIGENCE TECHNOLOGY ON 15-12-2017.

NATIONAL CONFERENCES [4]

1)“Cost Effective 2D Discrete Cosine Transform using Shift Register” at National conference Respograf-2008, 18th and 19th April 2008, AURORA’S Scientific, Technological and Research Academy, Hyderabad, India.

2)“Highly Scalable Image Compression for Network Application based on SPIHT

Algorithm” at National conference “Emerging Trends in Engineering,16th and 17th April 2008,Sri VenkateswaraPerumal College of Engineering and Technology, Puttur, India.

3)“Hybridization of Evolutionary Algorithm Techniques: Effectuates Beam

Forming in Smart Antenna with Improved gain and Suppressed Interference” at

National Conference NCACEE-11, 11th November 2011, Regency institute of technology, Yanam, India.

4)Implementation of Random Access Memories in SOCs using Reconfigurable Built-In Self-Repair Scheme at National Conference on Emerging Trends in Information, Digital & Embedded Systems NC’e-TIDES -12,Annamacharya Institute of Technology and Sciences,Rajampet,Kadapa,India

INTERNATIONAL CONFERENCE [1]

1)“Beam Forming in Smart Antenna with Spatial Diversity using Neural network and Fuzzy logic” at 2011 IEEE International Conference on Computational Intelligence and

Computing Research, 15th to 18th December 2011, Kanyakumari, India.

WORKSHOPS ATTENDED

1)All India workshop on “DSP PROCESSORS”, 14th and 15th July 2007 at R.G.M. College of Engineering and Technology, Nandyal, India.

2)All India workshop on “Training of intelligent robots and embedded systems”, 9th October 2009 at Madina Engineering College, Kadapa,India.

3)National workshop on “Transform techniques in DSP:Theory and Applications”,4th July 2009,K.S.R.M.College of Engineering, Kadapa,India.

4)National workshop on “Teaching Methodologies in Engineering Education”, 27th

March 2010 at K.L.M. College of Engineering, Kadapa, India.

5)National workshop on “MATLAB and Simulink for Engineering Education”, 6th September 2011 at Kadapa, India.

6)National workshop on Embedded Systems”, 8th March 2014 at NIST, Rajampet, India.

7)National Workshop on Research Methodologies, 22-04-2017,MRECW, Hyderabad

INTERNATIONAL JOURNALPUBLICATIONS: 19

1.“Enhancement in Gain and Interference of Smart Antennas using Two Stage Genetic Algorithm by implementing it on Beam Forming”, pp. 265-269, Volume 3 Issue (2), 2011, International journal of Electronics Engineering 2011.

2.“Beam Forming in Smart Antenna with improved gain and suppressed Interference using Genetic Algorithm”, pp. 33-46, Volume 2 Issue (1), 2012, Central European Journal of Computer Science.

3.“Hybrid Technique for Beam Forming in Smart Antenna with Spatial Diversity”, pp. 126-136, Volume 5, Issue (2), 2012, International Journal of Wireless and Mobile Computing.

4.“A Constructive Smart Antenna beam forming technique with spatial diversity”,

Published in IET Microwaves, Antennas & Propagation, Volume 6 Issue 7 pp. 773-780.

5.“A New Omni-directional Monopole Antenna for Interference Reduction “ .published in

International Journal of Computational Engineering Research May-June 2012 Vol. 2 Issue No.3,pp 637-641.

6.“A New Effective MUSIC Algorithm for Direction of Arrival Estimation and Combining It

with Beam Forming in Smart Antenna Systems” published in Journal of Communication Engineering and Systems. October 2012, Volume 2, Issue 2, pp.1-6.

7.“Beam Forming in Smart Antenna with Precise Direction of Arrival Estimation Using Improved MUSIC” published in Wireless Personal Communications, July 2013, Volume 71, Issue 2, pp.1353-1364.

8.Dual Dynamic node Flip flop with Embedded Logic Design ” in IPASJ International

Journal of Electronics & Communication, Volume 2, Issue 9, September 2014.

9.“Design of low voltage low power inverter based comparator using CMOS technology”

in International Journal of Emerging Engineering Research and Technology, Volume 2, Issue 6, September 2014.

10.“ High speed Implementation of 16 & 32 Bit Multiplication in MCMA Block of Fir Filter

Using Column Compression Multipliers & Hybrid Adder ” International Journal of Advanced Research In Electrical, Electronics and Instrumentation Engineering, Volume 3, Issue 9, September 2014.

11.“Design and Evolution of Performance of Spread Spectrum Techniques for Image

Steganography Using MIGLS” in International Journal of Innovative Research In Electrical, Electronics, Instrumentation and Control Engineering, Volume 2, Issue 9, September 2014.

12.“Implementation of High Speed MDC FET/IFFT Processor for MIMO-OFDM Systems” in

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, Volume 3, Issue 9, September 2014.

13.“Object Detection by Background Subtraction Algorithm by Using FPGA” in International

Journal of Engineering Research & Technology, Volume 3, Issue 10, October 2014.

14.“Constraint Random Verification of Network Router for System on Chip Application” in

International Journal of Advanced Technology in Engineering and Science, Volume 2, Issue 10, October 2014.

15.“Implementation of Medical Image Segmentation Using K-Means Clustering technique

on FPGA” in International Journal of Science, Engineering and Technology Research, Volume 3, Issue 10, October 2014.

16.“Design and Simulation of Pipelined Radix-2k Feed-Forward FFT Architectures” in

International Journal of Innovative Research In Electrical, Electronics, Instrumentation and Control Engineering, Volume 2, Issue 9, September 2014.

17.”An FPGA base architecture for linear and morphological image filtering” in International Journal of Research in Electronics & Communication Engineering, September 2014.

18.“Design of test pattern of multiple SIC vectors from low power LFSR theory and applications in BIST schemes” in International Journal of Science Engineering and Technology Research, October 2014.

19.“Hierarchical super-resolution reconstruction image using fast in painting algorithms” in

International journal of computer science engineering and scientific technology, October 2014.

PROJECTS GUIDED

Number of M.Tech Projects guided: 19

Number of B.Tech Projects guided: 21

M.Tech Project Done: Analysis of single channel monopulse (SCM) tracking for telemetry tracking applications.

B.TechProject Done:Optical Fiber Communication System (Transmission and Reception of audio signals through optical fiber cable)

SUBJECTS handled at B.Tech(UG) LEVEL

1.Satellite communications

2.Cellular and Mobile Communications

3.Microwave Engineering

4.Microprocessors and Microcontrollers

5.Digital Signal Processing

6.Digital Electronics

7.Linear IC design and Applications

8.Electronic Devices and Circuits

9.Optical Fiber Communications

10.Computer Networks

11.Data Communications System

SUBJECTS HANDLED AT M.TECH(PG) LEVEL

1.Detection and Estimation of signals

2.Analog IC design

3.Wireless and Communications and Networks

4.Microcomputer System Design

5.Design of Fault Tolerant Systems

6.Algorithms for VLSI Design Automation

PERSONAL INFORMATION

Name

:

T.S.GhouseBasha

Father’s Name

:

T.S.NazeerBasha

Date of Birth

:

02-07-1981

Marital Status

:

Married

Nationality

:

Indian

Strengths

:

Hard working, fast grasping,Analyzing, Learning

Iqama

:

Transferable Iqama

Place

:

Riyadh, KSA

Date:

(Dr.T.S.GHOUSE BASHA)

Mobile : 050*******

Email id : **********@*****.***



Contact this candidate