Mail id: firstname.lastname@example.org
To secure an appropriate position, this will provide growth opportunities with effective utilization of my skills and experiences also the opportunity to learn more in professional atmosphere.
B.Tech Electronics and communication engineering from Vasthsalya Institute of science and technology approved by JNTU passed out in the year 2007 with 55%.
Intermediate from SRM Junior College in the year 2003 with 64%.
SSC from Divyanjali High school passed out in the year 2001 with 75%.
1)Working as Engineer(Network and Planning team) at Reliance Jio contract company(Dynamic Techincal solutions)Hyderabad from May-2018 till date.
2) Successfully completed training on 3g,4g wireless and RF technologies at Pioneer Tele Services Hyderabad
3)Telecom Engineer,World wide industries Ltd,Mar 2014- Sep16
Responsible for assigned sales targets (monthly, quarterly and annually).
Goals set for centres month on month, maintaining relationship with target customers, customer service, ensuring high rate of return on investment, sales support and sales.
Preparation, pre-planning and other technical activities relating to the project.
Maintaining stock as per norms, Document collection, Provide daily updated data to Manager.
Proper execution of order and dispatch it on time.
Maintain good relation with client.
Responsible for operation and maintaining telecom sites.
4)RF Engineer,Aster Teleservices,Feb 2011-Feb 12
Handling Customer queries complaints over by phone.
Log Files on TEMS 8.1,8.1.3,9.1,10.1.5,Map info and Mcom
Making presentation plots (RX quality, RXlevel, SQI, CI,report).
5)Jr.Telecom Engineer, Jan 2010-Jan 11
Commissioning of Ericsson RBS Family
(2204, 2204v2, 2206, 2308, 2964, 2964v2 and2954)
Attending breakdowns due to various reasons & restore the same
E1 routing hard patching as well as soft patching.
Addition of TRU on traffic requirement
6)Call Centre Projects and Data entry work, Hyderabad,Sep 2007-2009
Design and synthesis of G.C.D calculator using VHDL code.
The main aim of this project is to learn modeling digital entities using VHDL code. Through this arithmetic calculate the G.C.D of two numbers synthesized. The design process involves marking the application into lower level specification, which describes not only the internal functions, but also the interaction among the components and external world.
Father : Girish Shastry
Permanent address : Saroornagar,Hyderabad.
Languages Known : English, Telugu and Hindi.
I hereby declare that the above furnished details are true to the best of my knowledge