Electrical Engineering Software Engineer

GAURI KALE

+1-562-***-**** *****.********@*****.*** linkedin.com/in/kale-gauri

EDUCATION

Master of Science, Electrical Engineering 2021 - 2023 California State University, Long Beach

Coursework: VLSI Physical Design, CMOS Electronics, Digital Signal Processing, Power Electronics, Analog Electronics, Microprocessors, Microcontrollers, Computer Architecture and Organisation, Digital Systems and Circuits Bachelor of Engineering, Electronics 2015 - 2019

University of Mumbai

WORK EXPERIENCE

Graduate Researcher, California State University Long Beach Jan 2022 - Present

• Led research team in physical implementation of on-chip (SoC) security and cryptography from FPGA to 45nm CMOS technology.

• Performed CMOS design to layout level transition, including timing analysis and performance evaluation, and conducted DC analysis of Chua’s diode and transient analysis of diode-modulator design to evaluate circuit behavior for encryption and decryption, optimizing PPA.

• Executed Netlist to GDSII implementation of Chua’s chaotic architecture using Cadence Genus and Innovus tools.

• Designed and simulated a two-stage operational amplifier in 45nm using Cadence Virtuoso, optimizing parameters for performance and implemented on a PCB for wearable device application.

• Published research on ”Implementation of Chua’s Transmitter and Receiver in 45nm CMOS Technology for Secure Communication” (IGESSC 2023) and ”Machine Learning in Chaos-Based Encryption” (IEEE Access Journal 2023). Digital IC Intern, Maxlinear Inc. May 2022 - Aug 2022

• Automated programming guide flow for UVM tests using Python, improving productivity by 80% and reducing errors by 75%.

• Collaborated with ASIC, Firmware, and software engineering teams for efficient project execution. Teaching Assistant, California State University Long Beach Oct 2021 - Dec 2021

• Solid State devices and IC fabrication - Read and evaluate student assignments and exams. System Software Engineer, Wipro Limited Jan 2019 - July 2021

• Developed and maintained system software solutions, improving system efficiency and reliability through code optimization and debugging.

• Applied technical & analytical problem-solving techniques, including Lean and Six Sigma to improve customer process.

PROJECTS

Implementation of transmitter and receiver using Chua’s chaotic system for secure communication - Designed a low-power communication system with on-chip security using Chua’s chaotic system, achieving 5mW power consumption in 45nm CMOS, and tuned parameters for optimal performance through pre-layout and post-layout sim- ulations.(Master Thesis)

DC Buck Converter Design - Designed a 200MHz 300mV amplitude ramp signal generator using Cadence Virtuoso and modeled efficiency and loss with MATLAB.

Custom Circuit Design of 4-bit Full Adder using 32nm PDK - Designed a 4-bit full adder circuit using inversion logic, optimizing it through sizing and design approach to meet power, performance, and area constraints. Design and integrate an IR Receiver Block using Cadence Virtuoso - Designed and integrated a Bias block, op-amp, comparator, and 4-bit DAC, and formulated the layout of the block using Cadence Virtuoso. TECHNICAL SKILLS

EDA Tools: Cadence Virtuoso, Xcelium, MATLAB-Simulink, SPICE, Spectre, Innovus, Xilinx (Vivado), ModelSim Programming Languages: Python, VHDL, Verilog, Shell, C, System Verilog Other Skills: Oscilloscope, Logic Analyzer, DMM, Static Timing Analysis, Statistical Analysis (JMP)

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