MD ZAHIDUL HAQUE

Interested Area: Project based Administrative work, Network, Security etc.

***-** ***** ** ****: 347-***-****

Queens, NY 11423 ad4onv@r.postjobfree.com

Education

The City University of New York, Lehman College Bronx, NY

Master of Science in Computer Science January 31, 2014

University Of Dhaka Dhaka, Bangladesh

Master of Science in Mathematics January 1998

Bachelor of Science in Mathematics as sub- Economics & Statistics December 1995

Touro University, Manhattan, NY

MS in Data communication & Networking

Completed 1st, 2nd and 3rd semesters but left 4th semester September 2016 to June 2018

Technology Skills

Virtual practical work in the MS classes (CUNY-Lehman College, Touro

University, IntoneNetworks, NJ) using packet tracer (2011-2016)

Networking: CISCO LAN/WAN and Windows Network design

Checkpoint Gaia 76 OS security design

Windows Server 2012 Administering

Done projects- MS classes at CUNY (2011-2013)

Web App: Enterprise Server, Website Design, SQL Server Database Accessibility,

Integration of Business Logic etc.

Professional Software: Eclipse, Net Bean IDE, Wampserver, Visual Studio 2008,

Mat Lab, Mathematica etc.

Web App: Enterprise Server, Website Design, SQL Server Database Accessibility, Integration of Business Logic

Professional Software: Eclipse, Net Bean IDE, Wampserver, Visual Studio 2008, Mat Lab, Mathematica etc.

Completed the Individual and Business TAX filling Law courses under H&R BLOCK, NY, USA

Work Experiences

Rana Gas & Auto Engineering Corp BP Jan 2021 to

784 Jamaica Ave, Brooklyn NY 11208

Union Island Corp September 2017 to June 2018

152 Union Ave, Brooklyn, NY 11206

Employer name: Ram Jan, Ph: 917-***-****, 718-***-****

Operator & System Technician (Internship)

Responsibilities

Maintain and repair hardware equipments including modem, router, switch, hub.

Analyze and design new PC, storage & recovery system to meet business requirements

Assembling, fix PC replacement procedures (Hard disks, SSDs, CPU, Mboards, graphic cards, PSUs etc.)

Work with database administration Intuit POS

Access to V950 Veder root securely, track shared and privileged accounts, password vaults across organizations

Redesign and upgrade the remote access systems to access to all 11 offices securely

Redesign and update VBA projects in Microsoft EXCEL latest version

Export, import and migrate inventory database in QBPOS 12.0 over remote access network

Intonenetworks.com Jan 2015 to Sept 2016

10 Austin Ave, Iselin, New Jersey- 08830

Manager: Sailaja Allu Ph: 732-***-****, 732-***-****

Network Admin (Internship training)

Responsibilities

Designed, Build, and Implemented various solutions on Check Point Firewalls, Global Traffic Managers, incident management

Performed Up gradation from old platforms to new platforms R62 to R75.20, R76, R77.

Deployed and managed Source fire devices where implemented access control policies, analyzed events and configured several basic rules

Administering Windows Domain Server & Linux web server management

Install, configure and manage VMware vSphere & Virtual Desktop Infrastructure (VDI) environments for all desktop computers

Manage network performance and maintain security related to virtual infrastructure

Configure Network and port forwarding management (DHCP, switches, routers, etc) and File sharing

Used Solar wind and Wire shark to perform network monitor like multivendor fault, performance, customized topology, deep packet inspection and analysis, network root monitoring etc.

Install, configure and manage VMware vSphere & Virtual Desktop Infrastructure (VDI) environments for all desktop computers

Troubleshoot issues related to servers and applications from end-to-end

Monitor and troubleshoot network connectivity & firewall policy over routing, switching

Manage Windows/Linux systems, Log files, PCI Compliance, site infrastructure & networking support

Research Foundation, the City University of New York & DOE New York, USA, Emp/work area: PS152M Dyckman Valley School

Technical Support Specialist (internship) PS 152M Dyckman Valley School

Responsibilities- September 2012 to Dec 2013

Assisted in set up of new computer equipment in classrooms and offices

Maintained classroom servers, ensured that LCD projectors, smart boards, and other related audio/video equipment were functioning, repaired hardware and software problems

Configured wireless devices to access DOE network

Maintained technology equipment inventory

Monitored equipment and worked with Help Center to ensure timely repair

Assisted school with other technical tasks as needed

Faculty of Engineering of Tokyo University of Agriculture & Technology Tokyo, Japan

Research Assistant 2004-2007

Studied research papers based on Theory of Quantum Computing, Martini LSI Circuit

Initiated Report on Peter Shore’s Quantum Prime Factoring and Period Finding Algorithm

Researched on the Selection Method of Minimal Set of Path using Path Graph in VLSI circuit

Faculty of Engineering of Shizuoka University Shizuoka, Japan

Research Assistant & System Administrator Jan 2000-May 2003

Utilized C language to Design the program to solve the theory of “Convergent Two-times Sorting Sequences”

Solved the theory of “Every Two-times Sorting Sequences Falls Onto A Periodic Cycle”

Designed the small C compiler

Maintained a Sun Solaris file server, which used Samba to serve files to mostly Windows 2000 clients

Implemented TCP/IP core networking services using Windows NT, DHCP, WINS and DNS

Upgraded workstations, printers, sent mail configuration which significantly improved desktop connectivity

Analyzed and designed new servers and storage system and maintained LAN/WAN Networks

Publication: Conference and Workshop papers

“Two-times Sorting”. Joint International Conference on Advance Science and technology, JICAST 2000, Pages-133-136, Shizuoka University, Date-December 2000, Author- Zahidul Haque, Makoto Araya, and Hiroyuki Iida.

“Every Two-Times Sorting Sequence Falls On to a Periodic Cycle”. Game Programming Workshop, GPW-2001, Hakone, Japan. October 26-28, 2001, Pages 48-55. Information Processing Society of Japan. Author- M. Sakuta, M. Araya, Z. Haque, H. Iida.

K. Katoh, T. Tanabe, H.Md. Zahidul, K. Namba and H. Ito, "A Delay Measurement Technique Using Signature Registers, " Proc. of 18th IEEE Asian Test Symposium, (ATS'09), pp.157-162, Taichung, Taiwan, 2009. http://www.icsd2.tj.chiba-u.jp/~katoh/publications.html.

Technical Reports

Shor Period Finding Algorithm, Haque M.Z, H. Nakajo, Nakajo lab, Dept of Computer and Communication, Tokyo University of Agri and Technology, Tokyo, Japan, 2005.

Solving the Factorization Problem of Large Number by using Shor Period Finding Algorithm, Haque M.Z, H. Nakajo. Nakajo lab, Dept of Computer and Communication, Tokyo University of Agriculture and Technology (TUAT), Tokyo, Japan, 2006.

”Socio-demographic profiles of the smallholder dairy farmers’ of Bangladesh”, *Mannan M. A., 2Haque M. Z and *Rabbani M. G.*Department of Basic and Social Science, Hajee Danesh Science and Technology University, Dinajpur, Bangladesh, 2Tokyo University of Agriculture and Technology, Japan, 2007.

K. katoh, T. Tanabe, H.M. Zahidul, K. Namba and H. Ito, “A Delay Measurement Technique Using Signature Registers-part2,”Conference on Fault Tolerance Computing (FTC), July 2009. http://www.icsd2.tj.chiba-u.jp/~katoh/publications.html

K. Katoh, T. Tanabe, H.M. Zahidul, K. Namba and H. Ito, "A Delay Measurement Technique Using Signature Registers, " in IEICE Technical Report of FIIS, June 2009. http://www.icsd2.tj.chiba-u.jp/~katoh/publications.html.

Research Work

Research Abstraction 1: Title - Selection Method of Minimal Set of Path Using Path Graph in LSI Circuit

Abstraction: Every path in a LSI logic circuit has the rising and falling delay. Practical circuit has huge number of paths, exponential in the size of gates. Our question is whether all paths in the circuit need to be tested in order to verify its timing behavior.

So without measuring the all paths in the logic circuit how we may select a minimal set of path to measure the delay test that reduces the time of delay measurements. Here I discuss the selection method of a minimal set of path by using matrices theory. Delay test is a test procedure to verify the timing performance in manufactured logic network. The maximum clock rate in LSI circuit is determined by propagation delay of manufactured combinational networks between the latches. If the delay of such network exceeds the specifications, incorrect network output value may be latched. So delay measurement is needed. Considering the linear dependency we may summarize our question. Row reducing echelon form and Gaussian elimination method in Matrix transformation is a way that how to consider the linear dependency. In this presentation, I say that how to calculate the minimal set of path R using Linear Algebra by following some steps of Path selection Method.

a.Target circuits b. Construction of path graph c. Matrix representation of path graph d. Solve the matrix using row echelon form e. Calculate the Rank R of the matrix using mat lab f. If Rank R is equal to equation R g. Decide the paths are linearly dependent or independent h. How to calculate the non measurements paths i. Comparing with each other circuit.

j.Calculation of Rank R by using Equations and Mat lab software from some papers which are already published in International Journal.

In general, to compute the rank of a matrix, perform elementary row operations until the matrix is left in echelon form; the number of nonzero rows remaining in the reduced matrix is the rank. It is proved that the rank R of the path matrix P is

R = 2(PI + sumj(fobj-1)) 1

Published by J LESSER, IEEE transaction on Computers, Vol C-29, no-3, March 1980, pp. 235-248. And A = I + B - S 2

Published by E. Flannigan, Dept of Electrical in Southern Illinois University at Carbondale, ISQED’06, IEEE 2006.

[Where PI is number of primary input, fobj is the number of fan out branches and summation is the overall gates and PI’s fan-out, I is the number of inputs, B is the number of branches and S is the number of stems. Using above path graph R = 9 as minimum set of path to be measured.]

By using our project, we calculated the Rank using eqn 1, 2, matlab & Comparing with each other circuit.

Number ofprimary input

Num ofpath

Number of Fan out

Num of segments

Non zerorow

Zero row

Rank byMat lab soft

Rank by Equation-1

Rank by Equation- 2

Fig-1,2

7

12

2

10

9

3

9

9

9

Fig-3,4

5

11

2

11

9

2

9

7

7

Fig-5,6

5

10

3

11

9

1

9

8

8

Conclusion: By using reduced row-echelon form paths in LSI logic whose are linearly dependent or independent are shown above. We have seen that the Ranks are not same to the result of equations and Mat lab software for these small circuits only. So it is recommended that only by hand calculation or own writing program of Matrices can confirm of which one will correct result either equation or mat lab software or our own software.

Research Abstraction 2: Title- Convergent Two-times Sorting Sequence

A two-times sorting sequence is constructed by calculating the next number with doubling the current number and sorting its digits into non-decreasing order. We propose the appropriate representation of a number with the arbitrary length of digits and the algorithms to calculate the sequence.

RESULTS: Two important properties of the sequences.

1.Cyclic Sequence, 2. Inductive Sequence. With the cyclic length 1, 2, 3, 4, 5, 6, or 12. By the examination of the computer program, every two-times sorting sequence falls onto a periodic cycle with the cyclic length 1, 2, 3, 4, 5, 6, or 12.

Dear Sir/Madam

I am writing to apply for State Program Examiner 1 role under NYS. I completed my MS in Computer Science from the City University of NY (40 credits-5 semesters- 2014), MS in Data Communication Networking from TOURO University, NY (32 credits- 4 semesters- not graduated) and BS & MS in Mathematics under University of Dhaka (subsidiary-Statistics, Economics-1998). I have a valid NY driver’s license, passed the Federal Tax Law course under H&R BLOCK, NY and am also fully vaccinated against COVID19. I believe you will find my keen interests in the position as well as 5/6 years working knowledge with BP brand Corporations, Research foundation of CUNY- DOE projects etc. In addition I studied 2 courses called Business Strategic Management Technology and Professional Communication at Touro University and for some research lab in Japan as Scientific Research Associate. As research associate my role was performing research activities mentioned in my resume, assisted the lab students providing guidance and support by evaluating working papers, helping in Math and Statistical problem etc. using Wolfarm Mathematica software.

During my time at Lehman College-CUNY and Touro University, I gained strong technical skills by working with some research and internship job projects on networking, database and business analyst that mentioned in my resume in details. Now I am performing administrative, operator & IT technician duties for our all BP brand Corporations’. Responsibilities are not limited to oversee exterior and interior maintenance tasks on a daily basis, operate various equipment and tools while adhering to all safety and regulations and guidelines, troubleshoot equipment and system issues and failures, diagnosing problems, performing repairs to quickly return them to working condition.

The position is leading to my becoming a skillful business problem solver for employee/clients as well I have learned how the company policy works and met the city enforcement rules even I face the city enforcement agency in several times at work places.

Thank you for reading my cover letter. I would appreciate the opportunity to meet with you in person to discuss my qualifications and your requirements for the role if needed. You can reach me at (ad4onv@r.postjobfree.com or 347-***-****) to arrange an interview.

Yours Sincerely

MD ZAHIDUL HAQUE

Contact this candidate