Peter Lieu acy6dy@r.postjobfree.com

626-***-****

** ********, ****** ** *****

Experience:

*/**** - ******* ****** ******* Corp Costa Mesa, CA

Senior Process Engineer

Support in SBIRs and IRAD for new approached involving electronic packaging and system builds using SMT and 3D Stacking. Design and fabricate tooling for molding/injection packaging.

Interaction with design team for process specifications and production issues; ERP, MRB

Auditing and inspection of inline/final product per ISO, MIL-STD and Program specifications.

Interpretation of drawing/BOM(s)/ITAR and MIL-STD Specs and fabrication of needed fixture/gigs.

Maintenance/Preventative Maintenance on Semiconductor lab/production equipment and facility.

6/2002 – 3/2013 ISC8 Costa Mesa, CA

Senior Process Engineer

Research New Techniques and Materials for electronic packaging. Injection molding evaluations and tooling.

Processing hybrid electronic packages; 3D Stacking of heterogeneous parts

Perform independent PFMEA and CARs. Automated Testing of Electronic Package Memory Modules.

Design processes and SOPs per contract restrictions/constraints; SPACE, ITAR, Medical, MIL

Maintenance/Preventative Maintenance on Semiconductor lab equipment, frontend and backside.

4/1998 – 6/2002 TRW Space and Defense Manhattan Beach, CA

Member of Technical Staff III

Process Engineer responsible for all metal deposition equipment and process within R6 GaAs Fab foundry. Training and validation of Technicians per SOPs

In Process electrical testing of wafers and data acquisition. Electrical Test Design.

SPC of metal deposition and test data analysis.

Failure analysis and reporting to MRB and Process Spec Documentation

4/1996 – 4/1998 Irvine Sensors Corp. Costa Mesa, CA

Process Engineer

Processing of stacked electronic chips and R&D chip interconnects.

Process control of metal deposition equipment-sputtering and evaporation

Use of Process diagnostic tools and process trouble shooting via equipment and process improvement.

7/1994 – 4/1996 Deutsch E.C.D. Oceanside, CA

Process Engineer - Plating

Process control and chemical Analysis for plating tanks.

Research and development for plating chemicals.

Develop Software for plating procedure and work orders.

Validation of plating coating finish per MIL-STD and MIL-STD testing.

Education:

1990-1994 UCLA Los Angeles, CA

Bachelor of Science, Chemical Engineering

Other:

US Citizenship. Gov. Secret Security Clearance. Microsoft Office. Autocad. Solidworks. Visio. ERP. Cleanroom Lab experience, Plating, Heat Treatment, Welding, CGMP, CALOSHA Waste-water/Hazardous training, HVAC, 3D Priniting, Semiconductor Equipment Operations. PLC, SMT, CVD. Automated Electrical Testing, Wafer/Die bumping, Tool Making/Machining Wafer/material Etching, Dicing, CMP, Thin Film depositions, Grinding/Thinning, Flip-Chip, Solder Reflow Equipment experience. Wire-bonding experience. CEH Training. Six Sigma Training. SPC monitoring. ISO training. ITAR. Technical Documentation