Alexander Voytov

*** ******** ***, *** ****, CA 95117

acwl0g@r.postjobfree.com 503-***-****

OBJECTIVE: Sr SW/System Engineer/Principal Engineering/Technical Lead

Skills:

Key words:

lab instruments control

SSD firmware, embedded software; C/C++/C#, asm, Python, shell scripts, QT, CORBA, FORTRAN, Delphi Pascal, Device drivers (Linux, Windows, RTOSs), ThreadX, UEFI, BIOS, ACPI, QNX, MQX, VxWorks, uCOS, ECOS, SW interfaces, data structures, algorithms, Ethernet, MAC, PCI, PCI-X, PCIe, WiFi

XDSL and voice band modem DSPs, soft modem, Intel network processors IXP 24XX/28XX/4XX, Tensilica, Tilera, PIC, 8051, ARM, ARC, SOC, TI BeagleBoard

Digital control, the DC-DC power supply, Point-of-Sale, 1553 network timers sync, IPsec, Low Power Systems, Power management

Bus analyzers, O-scopes, circuits’ emulators. Jtag, USB, PCIE, UWB,Bluetooth, Adhooc protocol, Wireless network/communications, error correction

x86, IA-32/IA-64, ARM7, A8, M0-M3 chipsets, MIPS/OPENRISC, Microchip, Freescale, WHCK, FPGA, Vivado, Petalinux

SW/PHY protocols; boards bring up; real time safety critical systems

System analysis and design as HW/SW integration and optimization

Libraries, protocols, including open source and proprietary

Streaming multimedia communications

ATE, JTAG, SNMP, ASN.1/2, Rational Rose, UML, XML, TCP/IP, I2C, RS232/485, SPI, 10Gps Ethernet protocol, network clock sync, LabView, LabWindows, EDI, RF receivers, RF modulation, ADC/DAC data transfer, spectrum analyzers, vector signal generators

SW life cycle project management and support, Hadoop interface, RAS, NVMe,RPC,RDMA

PROFESSIONAL EXPERIENCE:

Global Logic, Principal System Engineer, client Lime-Lab 05/16-pres

Linux kernel drivers development based on i.mx6 CPU from Freescale. Analog camera driver and LCD display drivers developments. Yocto kernel build. Git branches, patches.

Adaptrum, contractor 01/16-05/16

Porting Linux OpenWRT on company board. Board bring up. GPMC driver development. Configure FPGA with Xilinx Vivado and Xilinx Linux SDK. Linux DMA driver development to interface FPGA. RF communication, signal processing

AOSense, Principal Embedded System Engineer 08/14 12/15

Improvement for AOS control software on Windows7 platform. The code had been done as C#/C++/C package. Temperature controller driver development. Temperature controller controls laser temperature in a lab. USB interface for LPC1769 microprocessor as an embedded project for a laser control. Xilinx FPGA programming to control lab instruments. Board bring up. Hadoop interfaces for measured data

Skyera, Senior software Engineer 03/14 08/14

Drivers development for Linux kernel for Cavium/Tilera CPU: FPGA, CPLD, SSD, PLX, IDT. PCIE debugging,utilities to serve SSD: bad blocks discovery, initialization, configuration. Work with HW team to develop new NAND interfaces for SSD. NTB(none-transparent bridge) over PCIE driver for IDT and PLX PCIE switches development.

Aruba networks, Contractor 01/14 03/14

TI cc2541 SOC programming for Bluetooth beaconing. Power supply optimization. Bluetooth stack debugging and RF measurements. oscilloscope, DMM, and logic analyzer. Debug microcontroller behavior, e.g. PWM outputs, quadrature inputs, A/D performance with oscilloscope and other tools. MAC physical protocol development. WiFi interface to Hadoop from BLE beacon board.

AEHR Test Systems, contractor 08/13 - 12/13

Drivers development for PLX PEX 8625 PCIE switch board. The drivers served PLX board and 21 FPGAs attached. The drivers were used in test equipment production. C++ application development to interface test boards. Oscilloscope, DMM, and logic analyzer. Debug basic microcontroller behavior, e.g. PWM outputs, quadrature inputs, A/D performance with oscilloscope and other tools. Two development boards: server platform with x86-64 architecture and ARM7 for PSU tests control.

Accensus, SR SW Engineer, contract 11/12 – 05/13

Develop second in the industry high performance NIC board driver. The work applied for financial industry for high speed trades. The driver served 4x10Gbps Ethernet ports and PCIE interface. Driver worked on Linux distro on Tilera CPU. Driver architecture had been done as multithread code with individual thread per Ethernet port. Each received packet had been validated and timestamp had been added. After validation and time stamp, packets had been rearranged in the sender sequence and trancfered over PCIE bus. The main challenge of the project were: serve 40Gbps network input on 36 processor cores and to serve PCIE output 27Gbps on 6 cores.

Western Digital,Staff Firmware Engineer 10/11-11/12

SSD firmware development. Firmware architecture, SSD internal memory buffers management, FW brings up/update, boot, IPC, multiprocessor debugger, SSD controller simulation, SSD security and authentication architecture; SSD Firmware remote upgrade procedures; re-configurable computing on Tensilica CPU. FTL layer architecture. Hot/cold blocks management. Program/Erase control. Back-end performance and optimization. Interface between SATA front end controller and the back-end controller. Architect and implement processor operations for multiple system control units. Design software to manage microprocessor hardware and interface with user-space code. Implement user algorithms in software. Created build process and tools for multi-processor environment.

ASM, Sr System SW Engineer,contract 01/11-10/11

Tools control/simulation package for multiple SOCs to control. Design and implement fast inter-module communication between motor controllers and engine control units. ARM 7TDMI development board. Driver development for 2 smart motors on Windows XP and Windows 7 platforms. SW development for industrial semiconductor equipment manufacturer. A Multilanguage(C, C++, C#, WPF, WCF, Delphi/Pascal, English, Japanese) build script, smart motor control application and a snapshot of the equipment status. All projects had been done on C#/C/C++/Delphi Pascal and Windows power shell. CANbus, ModBUS interfaces, TCP/IP networking. Smart motor driver for Windows7 to control 3D robot movements with CANbus interface and ultrasound radar. WiFi control/config. Control pumps to supply fluids and gaseous into chemical reactor. 300Mm factory

Volcano, (Triple Crown Consulting) 08/10-11/10

Sr. System SW Engineer,

SW package for video processing. Camera driver(Linux, Windows, VxWorks) enhancement by video processing. The driver supports transducer 2D movements and its rotation as a radar. Real-time date preprocessing had been added to the driver body. Development and optimization SW code for ultrasound medical devices. Visual features processing on C++. Code optimization for RT medical data processing. Algorithms development in signed, unsigned and float video processing. QT and QWT graphical application development. Transducer control board driver with PCIE interface. SOC transducer control

Crystal I.T., company is out of business – Anthem, AZ 08/09-07/10

Sr. System Hardware/Firmware Engineer

RFID reader board design with PIC/Maxim SOC receiver. Choose microprocessors and daughter/development boards to meet system specifications for multiple control units. Lead of several team/manufacturers to manufacture RF circuitry, the controller programming and the USB interface. Firmware, embedded code and driver development for the RFID USB PCB board. Fingerprint recognition SDK development. RFID board driver development for Windows XP. Logic analyzers, O-scopes, circuits’ emulators. Orcad schematic capture. 4 layers board design with analog RF side and digital USB side. Evaluate and test new components for replacement of EOL components. Create and update schematics and PCB layout changes. Implement ECOs and BOM changes as needed. Coordinate between internal departments: Design engineering, Manufacturing engineering, Test engineering. Create and implement test strategies and then train other engineers on the intended strategy. Interfaces with vendors and other outside specialists. oscilloscope, DMM, and logic analyzer. Architect and implement processor operations for multiple system control units. Design software to manage microprocessor hardware and interface with user-space code. Implement user algorithms in software. Signal processing

Hypercom, Sr. System Software Engineer 02/08-07/9 POS terminal product. Linux team lead, to develop the Linux based Point-of-Sale terminal. Drivers development for sensors (current, voltage, temperature). BSP development for Linux, Uboot. Documentation control in the DOORS. Specification design and the team lead to implement my specifications. Ipsec implementation. Keys exchange protocols. Cooperation with the QA team to implement all security levels required for the VISA/MASTERCARD financial transaction. Video camera integration with the POS. Nucleus BSP.

Porting Linux kernel on ARM Cortex-A8 processor, PKI security with RSA libraries, anti-tamper sensors control, the DirectFB portable screen interface. VxWorks virtualization development on virtual Box. SOC board switches to control board tamers setup and configuration. WiFi interfaces.

Intel, Phoenix, AZ Sr Software Consultant 10/07-02/08

UWB/Bluetooth modem product based on ARM architecture. Driver development for UWB modem with USB, PCIE interface for Linux. Debugging PCIE on Intel motherboard. BSP for UWB board development. Multiplatform specification development and execution.The Sr SW engineer for new UWB modem product development on Linux platform with PCIE interface. Embedded code and drivers for WUSB and WHA protocols development and debugging. oscilloscope, DMM, and logic analyzer. The CCD/CMOS camera on the FPGA on ARM7TDMI/ ARM9 SOC platform.

ON Semiconductor, Phoenix, AZ 02/05 – 10/07

Principal Software Engineer

SOC and DC/DC battery powered power supply development. Team lead to develop the microprocessor and the DC/DC. BSP on the FPGA/simulator development. Driver development for NAND memory.

Principal SW developer for new product line - the DC-DC buck step down power converter and a MIPS processor for a digital real time control. The lead of the low drivers implementations and the operation system porting as well as applications development lead for the OpenRisc CPU team. The lead of the simulation team and the feedback control team lead for the DC converter team. Start from scratch with Matlab/Simulink simulation and the ADC/DAC and output filters design with linear and nonlinear PID controller. Performed the PWM/PFM analysis and MOSFET gates simulation as well. Microprocessor OpenCore1200 400 MHz design had been implemented from the Open Sources specifications. The ASIC was a custom for the Linux media player support with video/audio codecs AC3, MPEG2. Tools used Verilog and AMC Verilog, NML and C/C++. Audio driver development for MP3 player. CPU bring up and configuration. DMA, MMU, no MMU, DMA.

Intel Corporation, Raleigh NC, Portland OR 02/98 – 02/05

Component Design Engineer

Network processors IXP425/2850/2400/2800/1200 validation after type out. Randomization environment development and code randomization.

Voiceband modem design. Windows/Linux data/voice(audio) driver development Design and development remote modem test procedures: fax, stability, interfaces, security, to provide modem test coverage Test metric development to estimate tests efficiency by mathematical terms. The DSP development for Softmodem driver. Modem DSP and layer 2 debug on multiprocessor platforms and ones with hyperthreading and multocore/multiprocessor optimization. The product prototype team lead and the SW DSP developer.

ADSL modem driver designer on ARC processor platform. WDM driver development with PPP over ATM, WAN and RFC1483 deserialized miniport for DMA PCI bus master card. Responsibilities for PHY-WDM-NDIS interfaces. Transmission lines simulation for the DMT and voice communications.

Platform virtualization with EFI. Device drivers virtualization with KVM, Virtual Box and EFI.

MCI, Raleigh, NC 08/97 – 01/98

Programmer/Analyst

Team member of the ISO9001 R&D team. Designed and developed the network management software system for the ATM MIB network switches/routers control. The software established and managed the horizontal TMN Q3-compliant connections to the proprietary MCI services with ATM – Frame Relay interconnections. The software was written in C++ and used CORBA component based architecture

Project outcome – intercontinental ATM network replacement to reduce cost of network management and to increase quality of service for the MCI clients.

EDUCATION: Institute of Engineering Physics, Moscow, Russia

MS in Engineering Physics & Electrical Engineering.

Major: Chemical physics of combustion, detonation and explosion.

2nd major: Electrical engineering

Citizenship: U.S. citizen

Publications

Effect of composition of combustible gas mixture on the parameters of a plane shock wave generated by an explosion in air, A.P.Voitov, B.E.Gelfand, S.A.Gubin, V.N.Mikhalkin and V.AShargatov springerlinkFebruary 1, 1985

Authors: Alex Voytov Citations: Sixteenth International Symposium on Shock Tubes and Waves, Aachen, West Germany, July 26-31, 1987: Blast Waves Generated by Planar Detonations, P.A Thibault J.D.Penrose J.E.Shepherd W.B.Benedick D.V.Ritzel

http://www.osti.gov/energycitations/product.biblio.jsp?osti_id=6196711,

http://waesearch.kobv.de/authorSearch.do;jsessionid=1C44CAC4C2095174F52F49EAA86320D2?query=Mikhalkin%2C+V.+N.&pageid=1325828045675-1489268433270644

http://waesearch.kobv.de/uid.doquery=nat_lic_papers_NLM190243260

www.dtic.mil/cgi-bin/GetTRDoc?AD=ADA340396

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