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Engineering

Location:
Bellevue, Washington, 98007, United States
Posted:
October 24, 2016

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ANJALI CHAUHAN

Thermal Engineer

***** ** **** **., **-297

Bellevue, WA

acw7y6@r.postjobfree.com

Skype ID: acbu2012 WORK STATUS IN USA: H1-B VISA (Since Dec. 21, 2015)

985*******

Continued

OBJECTIVE

Self-Motivated Thermal Engineer willing to apply my education and experience for product development in a fast paced environment.

SUMMARY

Strong background in Heat Transfer, Fluid Dynamics, Thermodynamics and Materials Characterization.

Skilled in CFD analysis and Thermal analysis tools: ANSYS Fluent, Icepak, FlothermXT and FloEFD.

Hands-on experience in design, development and launch of high-volume consumer electronic products.

SKILLS

ANSYS Icepak and FLUENT AutoCAD and CATIA Shear Test Analysis

FloTHERM XT, FloEFD Active and Passive Cooling Acoustic Testing

FEA (ANSYS and COMSOL) Air Flow Test Chamber Materials Characterization

Creo and Solidworks Fan Selection Data Acquisition and LabVIEW

C/C++, Python and MATLAB Thermal Experiments Image Analysis on SEM and AFM

EDUCATION

Enrolled for Diploma in Product Design (Aug. 2016 Present)

CADD CENTER (ISO Certified), Chennai, India.

Courses: AutoCAD, CATIA, GD&T.

PhD in Materials Science and Engineering (May 2014); GPA: 3.6 / 4.0

SUNY Binghamton, NY, USA.

Concentration in Electronics Packaging: Heat Transfer, Fluid Flow and Microchannel Cooling.

Master of Science in Materials Engineering (2009); GPA: 3.46 / 4.0

SUNY Binghamton, NY, USA.

Concentration in Thermodynamics, Fluid Dynamics and Materials Characterization.

Bachelor of Technology in Mineral Engineering (2005); GPA: 4.02 / 5.0

Indian Institute of Technology (Indian School of Mines), Dhanbad, INDIA.

Concentration in Metallurgy, Materials Processing, Thermal Engineering, Machine and Plant Design.

WORK EXPERIENCE

Microsoft Corporation, Redmond, WA, USA.

Thermal Engineer (18-months Contract, Oct. 2014 April 2016)

Product: Surface Tablets

Job Responsibilities:

Design guidelines based on thermal simulation and measurements of physical prototypes. Identify risks and assess design margin.

Develop test set-ups, analyze test data and correlate thermal design to test data.

Evaluate thermal load of the system. Establish temperature thresholds for user comfort level and component level reliability.

Laboratory materials selection and purchase.

Intel Corporation, Santa Clara, CA, USA.

Thermal Engineer (PhD Internship, May 2013 Mar. 2014)

Product: Quad Small Form-Factor Pluggable (QSFP)

Job Responsibilities:

Analyze and optimize thermal solutions for densely packaged Receiver.

Reliability analysis of the Rx module for mechanical stability.

Interface with mechanical engineers, electronics engineers and optical engineers to resolve thermal issues.

Develop and execute thermal design verification test plans per requirements and specifications to ensure prototypes meet design requirements.

Research on implementation of new technologies or materials for innovative thermal solutions.

Continued

Support other groups on selection of Heat Sinks and Thermoelectric Generators (TEGs).

RESEARCH EXPERIENCE

Research Foundation for SUNY, Binghamton, New York, USA.

Research Assistant (Jun. 2009 May 2013)

Project 1: Liquid Cooling of 3-Dimensional (3D) Microprocessors.

The 3D microprocessor consisted of planar Quad-Core Processor with an integrated Microchannel Heat Sink, DRAM, Air Heat Sink and TSVs.

The design was built in GAMBIT and analyzed in ANSYS FLUENT. The objective was to minimize the hot spot temperature and temperature

gradients for the reliability of the processor. The project incorporated following simulations:

Optimized placement of microprocessor components to mitigate the hot spot in the chip.

Application of User Defined Functions (UDFs) to control the power of the processor components.

Optimized placement of microchannel heat sink in 3D processor.

Optimization of the microchannel heat sink design for effective cooling of the non-uniformly powered quad-core processor.

Comparative study of planar flow and impingement flow in microchannel heat sink for 3D-Quad-Core Processor.

The study discusses the trade-offs in microprocessor floor planning, microchannel heat sink design and TSVs for mitigating the thermal issues

in 3D-Quad-Core Processors.

Project 2: Estimate the Thermal Time Constant of the Hot Spot for DTM techniques.

Analyzed the transient power of Intel P4-processor for effective application of dynamic thermal management (DTM) techniques to prevent

power overshoot at hot spots.

Analysis of real-time power was done at finer time scale of 2.5ms and coarser time scale of 50ms to estimate thermal lag of hot spot.

The thermal response of the processor is interpreted in terms of thermal time constant of the hot spot.

Project 3: Reactive Wetting in Metal-Metal Systems for Lead-Free Solders .

Investigated the physicochemical hydrodynamics and intermetallic compounds formation for Sn wetting on Au/Cu substrates.

Experiments were done on high temperature and high pressure apparatus in acidic conditions. Applied DAQ and LabVIEW to capture

experimental images.

Digital image analysis was done by ORIGIN. Surface analysis was done by optical microscope, scanning electron microscope (SEM) and

atomic force microscope (AFM).

HONORS

Honorable Mention in Micro & Nano Technology Society-Wide Forum, IMECE2011, ASME Conference.

Over 200 posters from all over the world were presented in the session.

Poster Title: Single-Phase Microchannel Cooling of a Stacked Quad-Core Processor and DRAM.

Article published in Binghamton University Research Magazine under the title Students cool calculations boost electronic devices

performance, February 1, 2011.

CERTIFICATIONS

Continuing Education Certificate issued at 2011 Electronics Packaging Symposium, Binghamton University, Binghamton, NY.

Lean Six Sigma Green Belt (SUNY Binghamton, NY, USA).

PUBLICATIONS AND CONFERENCE PROCEEDINGS

Chauhan, A., Sammakia, B., Ghose, K., Afram, F., Refai-Ahmed, G. and Agonafer, D., Solving Thermal Issues in a Three-Dimensional-stacked-

Quad-Core Processor by Microprocessor Floor Planning, Microchannel Cooling and Insertion of Through-Silicon-Vias, ASME Journal of

Electronic Packaging, vol. 135(4), 2013.

Liang Yin, Anjali Chauhan and Timothy J. Singler, Reactive wetting in metal/metal systems: Dissolutive versus compound forming systems,

Materials Science & Engineering: A, vol. 495, pp. 80-89, 2008.

Chauhan, A., Sammakia, B., and Ghose, K., Transient Power Analysis to estimate the time lag of the Microprocessor hot spot, Proceedings of 31st

IEEE SEMITherm Symposium, San Jose, CA, 2015.

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Chauhan, A., Sammakia, B., Afram, F., Ghose, K., Refai-Ahmed, G. and Agonafer, D., Single-phase microchannel cooling of a stacked quad-core

processor and DRAM, Proceedings of ASME, IMECE2011, Denver, CO.

Chauhan, A., Sammakia, B., Ghose, K., Refai-Ahmed, G. and Agonafer, D., Hot spot mitigation using single-phase microchannel cooling for

microprocessors, Proceedings of IEEE, ITherm2010, Las Vegas, NV, pp. 1-11.

Chauhan, A., Static and Dynamic Thermal Management of High Performance Microprocessors, PhD Dissertation, SUNY Binghamton, NY, 2015.

Chauhan, A., Hot Spot Mitigation in Microprocessors by Application of Single Phase Microchannel Heat Sink and Microprocessor Floor

Planning, MS Thesis, SUNY Binghamton, NY, 2009.

LEADERSHIP & TEAMWORK

Actively participated in non-profit activities organized by Intel Involved Volunteer Program . (May 2013 to March 2014).

2011 Electronics Packaging Symposium, SUNY Binghamton, NY. (Oct. 2011)

As a graduate student, played an active role in the organization of the symposium and interacting with the industry representatives for the ongoing

research at the Binghamton University.

PROFESSIONAL ASSOCIATIONS : American Society of Mechanical Engineers (member since 2011).

REFERENCES: Available on request.



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