Electrical Engineering Systems
Resume:
ARHAM A
ARHAM ABEDIN
Gainesville, FL 32608.
*********@***.***
EDUCATION
May 2016 UNIVERSITY OF FLORIDA Florida, US
Masters of Science in Electrical and Computer Engineering GPA 3.41
Relevant Coursework: VLSI, AVLSI Technologies, Computer Architecture, RF circuits and Systems, Future of Microelectronics, Reconfigurable Computing, Pattern Recognition, Image Processing. May 2014 NATIONAL INSTITUTE OF TECHNOLOGY (NIT) INDIA Bachelors of Technology (B.TECH) in Electrical Engineering GPA 7.79
Top ranked government funded technical institution.
Relevant Coursework: Power Electronics, Control Systems, Power Systems, Digital and Analog Circuits, Electrical Machines I and II..
INTERNSHIP
TATA MOTORS LIMITED
Project Trainee
Designed OVERALL EQUIPMENT EFFECTIVENESS through Manufacturing Execution System Detailed analysis of the Downtime data in the Dressing Line and Engine Assembly of POWERTRAIN Shop. Understanding of PLC (Programmable Logic Control) used in ALLEN BRADLEY SYSTEMS and the function of KOMATSU tandem press line.
PROJECTS
4x1 SRAM Cell Design in Cadence
Designing a 4x1 SRAM cell and checking for DRC and LVS correctness. Also, real time simulations are done to check the performance of this SRAM. Determined important parameters like cell area, static noise margin, capacitance, read and write access times.
Low Power implementation of FFT processor (Dynamic voltage Scaling System) Designing an FFT processor (using VHDL) and subjecting it to a feedback control system that ensures a control on the power utilization of the processor by controlling the frequency and voltage supply of the processor. Designing a 1Gbps Wireless link between Earth and Moon A wireless link between earth and the moon is estabhlished using Ku band and QPSK modulation scheme. The transceiver architecture was designed in Agilient ADS. A BER (Bit Error Rate) of less than 10^-5 and a prper EVM
(Error Vector Magnitude) was achieved.
Design of a 2.5 Ghz CMOS low noise amplifier
Microwave transistor low noise amplifier design operating in the 2.44 Ghz frequency using ADS. Gain of the amplifier obtaioned was 16.66 dB and a noise figure of .983 dB was obtained. Custom layout (including bond pads) was designed in Cadence Encounter using TSMC .35 micron technology. Fine grained scheduling on Multi-channel memory systems Exploiting this scheduling technique, an increased performance is achieved in these multi-channel systems by finding workload independent configurations of instruction. 1-D time domain based Convolution
Convolution done exploiting techniques like pipelining, synchronization of different clock cycles on which the SRAM and the datapath are running.
The Big Bang Big Crunch Optimization
Came up with an original MATLAB code for the above mentioned optimization technique, which helps us to optimize multi-dimensional functions efficiently.
ADDITIONAL SKILLS
Positive encouraging work attitude, good Interpersonal skills, efficient ability to work in a group.
Computing: MS Office.
Programming: C, C++, JAVA, Verilog, VHDL.
Operating Systems: Windows, Linux.
Tools : Cadence, Spectre, Xilinx, Agilent ADS, MATLAB.
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