Post Job Free
Sign in

Engineer Manager

Location:
Granite Bay, CA
Posted:
February 21, 2016

Contact this candidate

Resume:

K. Chen, */**/****, page * of *

Keping Chen

Tel 408-***-**** (Cell) 916-***-**** (home)

Email: ******@*****.***

Summary

• 25-year video industry design and 15-year hands-on management experience

• Ph.D in VLSI and video processing from a Swedish university

• Specified/designed/managed multiple video/audio processing systems

• Inventor of 6 patents.

Technical Profile

• IC, FPGA and hardware architecture, algorithm specification and development

• Extensive digital video and audio processing knowledge

• In depth knowledge and design experience in FPGA development process

• Hardware, FPGA and ASIC design experience

• Analog, digital and system knowledge

• Design tools: Matlab/Verilog/VHDL/Modelsim/OpenCV/C/C++/HLS Education

Ph.D.: Oct 1987, Dept of EE, Linköping University, Sweden M.Sc.: May 1985, Dept of EE, Linköping University, Sweden B.Sc.: Jan 1982, Dept of EE, Zhejiang University, China Working Experience and Achievements

Principal Designer, Cube Vision Technologies Inc, Jan 2007 to now: Developed video scaler and motion adaptive/compensated de-interlacing. The FPGA IPs have been licensed to OEMs in the broadcast industry including AJA, Barco, Christie Digital, Harmonic and other video display companies. FPGA IP platform demos are available to show superior video quality by our proprietary video processing technology, competing with VXP and HQV video processors. Through FPGA IPs I provided and my FPGA consulting design services in last 9 years, I am very family with FPGA product families including Xilinx Kintex7, Virtex7, Zynq, and Altera devices and tools including Verilog/VHDL, Vivado, Modelsim, Matlab, FPGA debugging tools, c/c++ for high level synthesis. With my Ph.D in digital signal processing, I have deep understanding of digital signal processing and Knowledge in Microprocessors, hardware and firmware, real-time systems, and analog/digital designs. K. Chen, 2/21/2016, page 2 of 2

Director of Faroudja Engineering, Genesis, CA www.GNSS.com March 04 to Dec 06:

• In charge of Faroudja Engineering. Faroudja is a Genesis’s hardware business unit

• Developed a modular, flexible and scalable high-end video processor DVP1080. Started from concept, architected, planned and led the team completed the product. Bundled with a JVC projector, DVP1080 has won the 2006 product of year award from Electronic House.

• Improved design process at Faroudja, introduced bug track system, QA and test procedures for Faroudja hardware products.

Principal Engineer, Thomson, www.thomson.net (GrassValley Group), Mar 02 to Feb 04:

• Developed most dense and cost effective 8964* product family with 4 channel composite decoders, 4 channel composite encoders, 4 channel frame synchronizers.

• Developed 3D composite decoder algorithm and implemented them in FPGA based products for the broadcast industry.

Director, Advanced Technologies, Leitch/Harris Canada, www.leitch.com Sept 99-Feb 02

• At this position (not full time function), I was reporting to President of Leitch, in charging of technology partnership and acquisition. I led technical due-diligence teams composed of experts inside and outside of the company.

• Initialized and entered a strategy partnership with AMCC in 1.5Gb/s transceiver HDSDI for the broadcast industry.

• Leading efforts in technical due-diligence in acquisition of 3 companies (1 public and 2 private), contributed to Leitch’s revenue and technology grow. Manager, Hardware Development, Leitch, Canada, www.leitch.com April 97-Feb 02

• Supervised 20 hardware designers

• Initiated and specified all Leitch Toronto’s HDTV projects, lunched and delivered 6 HDTV products in 9 months

• Specified and managed many video, audio and data processing projects included video up/down converters, 3D composite decoder, noise reducer and motion logo insert

• Project and resource co-ordination, review and management Principal research engineer, Leitch, Canada, www.leitch.com Jan 93-April 97

• Initiated, specified and designed 3 video ASICs

• Project management for all ASIC projects

• Designed 5 hardware video processing boards including PCI motion JPEG, MPEG2 codec, video rate converters and noise reducers.

Multimedia group leader, ATI technology, Canada, WWW.ATI.com May 92-Dec 92

• Specified and developed PC to TV and TV to PC ASIC

• Developed a few ideas, led to 2 USA patents in video signal processing. Senior design engineer, Gennum Corp., Canada WWW.Gennum.com Aug 90-April 92

• Introduced CMOS design style and technology to Gennum

• Designed 2 CMOS full custom chips. One of them, GS9000, is a 400Mb/s de- serializer using 1.2um CMOS. 400Mhz CMOS chip using 1.2um technology was an industry record at the time.

Consulting engineer, IVP, Sweden http://www.ivp.se/ Aug 89-July 90

• Initiated and designed a single chip smart sensor with integration of 256x256 photo sensor, 256 A/D converter and 256 bit-serial processor based on one of my invention. Swedish Ericsson licensed our patent for its radar applications.



Contact this candidate