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Technical Support Engineering

Location:
Mumbai, MH, India
Posted:
February 18, 2016

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Resume:

ANKIT TRIPATHI

Email-id: ***********@*****.***

Mob no- +91-882*******

LinkedIn profile link- http://in.linkedin.com/pub/ankit-tripathi/26/922/a

Career Objective:

To associate my technical skills with my strengths for welfare of your esteemed organization and to make effective contribution through innovations and discipline. Experience Summary:

1.5 years of Experience in EDA field.

Extensive experience in FPGA design tools, pre and post layout simulations product promotion and customer support supervision.

Prepare and update the customer database from time to time for customer application information.

Specialize in pre-sale and post-sale activities.

Closes 7 deals, while working in a team, with some major institutions like msme kolkata, IDTR Jamshedpur, MNIT Allahabad etc

Worked as Research scholar in LNMIIT, Jaipur [July 2013 - Jun 2014] Tools and Language Details:

HDL : VHDL, Verilog

Pre Layout Simulator : DSCH (Microwind), ModelSim

Hierarchical Implementation : nanoLambda (Microwind), Simulation : PROthumb (Microwind)

Memory Simulator : MEMsim (Microwind)

Job Responsibilities in ni logic Pvt. Ltd., Pune [August 2014- Present] Designation: Application Engineer

At ni logic, I am involved in providing technical support to customers using Microwind, Quartus II and System Crafter tools. The profile requires comprehensive understanding of both analog and digital flow. The job responsibilities broadly include:

Technical product presentations at customer sites or seminars and product demonstrations.

Technical support on our EDA products to clients

Educating customers on the benefits of utilizing our products

On-site product installations and customer product training

Review and quality check technical and product documentation.

Serve as a liaison between Sales/Marketing and customers to resolve application issues and technical questions

To achieve the end goal of helping the sales team to win business Academic Details:

M.Tech. (Electronics and Communication Engineering) LNMIIT, Jaipur [CGPA: 6.6/10] B.Tech. (Electronics and Communication Engineering) UPTU, Lucknow [63%] SSC (UP Board) Chacha Nehru Smarak Inter Collage [61%] HSC (UP Board) Chacha Nehru Smarak Inter Collage [68.67%] Core Competency:

Digital Design Concepts

IC Fabrication process and FPGA design flow

Understanding of Synthesis, Static Timing Analysis, Floor planning, Clock Tree Synthesis, Placement Routing, Physical Verification.

Understanding of Layout Design, DRC and LVS.

Papers/Journals Published:

“Basics of Optical OFDM”; Recent Advances in Communication, Control and Computing Technology (RACCCT-2012), Ankit Tripathi et al.

“An Innovative Solution to Minimize the Power Dissipation in SRAM Cell”; 3rd International Conference on Emerging Trends in Engineering and Technology

(IETET-2012), [Conference Proceeding is published in, International Journal of Applied Engineering Research (IJAER)], Ankit Tripathi and S. Biswas.

“A 4 4 SRAM Cell Array for Low Power Applications”; 2nd International Conference on Nanotechnology- Innovative Materials, Processes, Products and Applications (NANOCON-2012) at Bharati Vidyapeeth University, Pune, India, Ankit Tripathi and S. Biswas.

Academic Projects:

M.Tech. Projects:

LNMIIT, Jaipur Thesis: Design of highly stable, dense SRAM cell with low leakage current using various technology nodes (32nm, 45nm, 65nm, 90nm) Supervisor: Dr. Somnath Biswas (Associate Professor) Description:

The objective of this work is to improve the cell stability with low leakage current and reduced power dissipation

Design a new SRAM cell to reduce the power dissipation, leakage current and enhance the stability.

Present some techniques (predefined) to reduce the access time and delay. COMPARISON AMONG DIFFERENT CMOS INVERTER WITH STACK KEEPER APPROACH IN VLSI DESIGN

Team Size: 2

Description:

Designed CMOS inverter with sleepy stack keeper approach using DSCH. Stack keeper structure that can save leakage power up to two orders of magnitude for circuits that require extremely low leakage power consumption.

Finally the Layout of the inverter done and cleaned for any DRC error using Microwind’s nanoLambda tool.

The proposed technique is “SLEEPY STACK KEEPER” and we compared the power consumption with other existing techniques. This technique is more effective in reducing power consumption. The result is simulated with MICROWIND software and compare at different technology 45nm, 65nm, 90nm and 120nm. My Contribution:

Responsible for designing layouts in 45nm, 65nm, 90nm and 120nm technology nodes. B.Tech. Project:

Witricity (Wireless Transfer of Electricity):

Team Size: 4

Description:

The aim of this project was to transmit electrical energy without any physical medium using inductive power transfer.

The system involves two electromagnetic resonators coupled through their magnetic fields.

Two resonant objects of the same resonant frequency tend to exchange energy efficiently, while interacting weakly with extraneous off-resonant objects Workshop Attanded:

Network of Engineering Institutions (NEI) workshop on “Designing of Analog CMOS Circuits Design” hosted by Dhirubhai Ambani Institute of Information Technology, Gandhinagar.

Teaching Competencies:

Handled following Labs during M. Tech:

• Digital Circuits and Systems on XILINX platform; total strength 400.

• Principle of Communication Lab (Hardware and Software); total strength 250.

• Basic Electronics lab (Hardware); total strength 100.

• Optics and Laser Communication; total strength 150.

Teaching Assistant during M. Tech:

• Microprocessor and Interfaces Course.

• Optics and Laser Communication Course.

Achievements:

Participated in NSS camp of duration 120 hour.

Participated in national level singing competition.

Won consolation prize in state level Quiz competition.

Conducted one week workshop on “Introduction to VLSI Circuits and Layouts”.

Core team member of PG and UG admission committee of LNMIIT, Jaipur in sessions 2011-12 & 2012-13.

Declaration:

I hereby declare that all the information mentioned above is true to the best of my knowledge.

Date: 1 6 /02/2016

(Ankit Tripathi)



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