VLSI, Verilog HDL, C programming, Embedded C

Siddhartha Sankar Pati

Email: **********.****@*****.***

Phone.No: +91-787-****-***

Objective

To work in such an environment where I can utilize the knowledge I have at its best as well as learn as much as I can that will help me in leading my career a step forward. Strengths

Hard Worker

Continuous Learner

Team player

Education

Bachelor of Technology C.V. Raman College Of Engineering(under BPUT) 7.6 CGPA

(Electronics & Telecomm. Engineering)

+2 Science Khallikote Jr. College (under CHSE,Odisha) 62.30%

10th Saraswati Vidya Mandir (under BSE,Odisha) 84.10% Skills

Good knowledge in C programming

Decent knowledge about Verilog HDL and VHDL

Good knowledge in Embedded C

Certifications

Name of the Program Date of completion

Cambridge EOSL Entry Level Certificate 30/4/12

Digital VLSI Design Aug 2012 - Dec 2012

Analog VLSI Design Feb 2013 – May 2013

Advanced Embedded System 1/6/13 – 29/6/13

Inplant Training 20/6/14 - 22/6/14

Training and Project

Summer industrial training undertaken in the Control and Instrumentation department at National Aluminium Company,Damanjodi.

B.Tech project on 16 Bit ALU Design Using Reversible Gates Hobbies

Listening Music

Watching Movies

Personal Information

Date of Birth: January 12th 1993

Languages Known: English, Hindi, Telugu and Odia. Mother’name: Padma Priya Pati

Father’s name: Uma Kanta Pati

Permanent Address: L.I.G.-211, H. Board, Brahmapur, Ganjam, Odisha

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