Design Project
Resume:
ADITHI. M
MTECH, VLSI Design and Embedded Systems
Department of ECE, Sai Vidya Institute of Technology,
Bangalore - 560064
**************@*****.***
Objective
To seek an opportunity in your esteemed organization that will enable me to use my technical and strong organizational skills, contribute effectively for the progress of the company, to learn and grow with the company.
Skill Set
Basics of C, C++
Verilog, Logic Design and basics of Embedded Systems.
Tools – VLSI design in CADENCE analog and digital environment
M.Tech Project
Design and Implementation of Fault Tolerant Protocol for NoC-Based MPSoC Using Verilog HDL.
. In this project, a novel fault tolerant protocol is designed and implemented that uses the concept of adaptive XY routing algorithm along with FSM logic to deal with the faults present in the network. The protocol designed detects the faulty node in the network and isolates it providing a new path for the message to reach destination node from source node.
Achievements in M.Tech
Participation in competitions
Presented a paper on “DESIGN AND IMPLEMENTATION OF FAULT TOLERANT PROTOCOL FOR NoC-BASE MPSoC USING VERILOG HDL” in 2nd INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, IMAGE PROCESSING AND VLSI DESIGN held at Don Bosco Institute of Technology, Bangalore.
Seminars presented on OPTICAL INTERCONNECTS TO SILICON CHIPS, BUILT-IN SELF REPAIR SCHEMES FOOR FLASH MEMORIES.
Proactive participation in events and taking up the responsibilities and work hard to strive to achieve the responsibility, being class representative, all these have helped me learn leadership qualities, learn morale values, to work with the group and build a conducive and co-operative environment.
Achievements/Awards
Presented a paper on Sustainable agriculture in Lake 2006 symposium conducted by IISC, Bangalore.
Attended a workshop on INDUSTRIAL AUTOMATION conducted by “Prolific Systems and Technologies Pvt. Ltd”.
Presented a paper on Solar Wind Hybrid System and secured 3rd place in Prastuti-2012 conducted by PESITM, Shimoga.
Participated in 8th National Aptitude Test (2012) conducted by NIIT, and scored 67%
Hobbies
Travelling to different places and capture their cultures
Sketching, painting
I put my active participation in serving blind children
Personal details:
Date of birth : 15/03/1991
Father’s Name : Manjunath P
Address : ‘Renu’, 1st main road, Devaraj urs extension, shimoga
Languages Known : English, Hindi, Kannada and Telugu
Strengths : Keen learner, Flexible to adapt to situations and environment. Willingness to take responsibilities and work together with the company.
I hereby declare that the above written particulars are true to the best of my knowledge and belief.
Date - ADITHI M
Place- Bangalore
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