TEST & PRODUCT ENGINEER

Resourceful and detail oriented Test & Product Engineer with over 30 years of progressive experience working with industry leading microprocessor, wireless, and safety device companies. Recognized as a highly knowledgeable "ʺgo to resource"ʺ whose advice on technical matters is held in prominent esteem by consulting engineers, peers, junior staff, clients, and key decision makers. Aggressive in identifying inefficiencies, assessing risk, and implementing lasting solutions that increase productivity, enhance accuracy, and minimize project downtime. Confident communicator who effectively exchanges complex information across numerous platforms and among various stakeholders. Maintains a high standard of professionalism and flexibility while facing stressful and unexpected situations. AREAS OF EXPERTISE

ü Product Development

ü Process Optimization

ü Project Management

ü Requirements Gathering

ü Stakeholder Relations

ü Leadership & Team Building

ü Procedure & Process Creation

ü Troubleshooting & Analysis

ü Reporting & Documentation

Computer Skill: Microsoft Office Suite C C++ Pascal Assembly & Tester Based Languages PROFESSIONAL EXPERIENCE

Product & Test Engineer Texas Instruments – Dallas, TX 1999 to Dec 2014

• Tasked with improving yield, cycle time, speed, reliability, and ramp to production for various products including simple wireless devices, automotive safety devices, and microprocessors for Sun Microsystems

• Developed analysis tools such as master device lists, threading analysis, and SAS graphs and trends to investigate and monitor critical process steps

• Monitored key metrics for maximizing good units shipped

• Assisted in the setup of automated processes such as By die, folding, and BSE

• Experienced with using Inline, Parametric, PreLaser, Multiprobe, and FT Yields

• Led several new product startups and development programs

• Improved yield, TTR, and characterization programs for safety products using LTX Fusion and TI’s VLCT tester platforms

• Gathered client requests and qualified new products, ensuring they perform to the specifications Key Achievements:

ü Reduced test time for the SPARC probe test group by up to 40% and improved FT yields from 60% to over 80% by analyzing and updating program patterns to cause product to fail at the beginning of the development process rather than the end

ü Saved millions on product development costs by creating the By Die process which identifies potential product failure early on in the development process ü Enhanced final test yield for automotive safety chips from low 90s to 98% by improving the test program Product Engineer Hitachi Semiconductor America – Irving, TX 1986 to 1999

• Led a team of 10 operators and 3 engineers in the setup and production of all memory devices from fabrication to stock, with exposure to the assembly process

• Categorized failures for memory devices including procedures and controlled documentation EDUCATION & MEMBERSHIP

Bachelor’s Degree, Electrical Engineering University of Michigan, College of Engineering 1981

• Graduated Eta Kappa Nu (EE honor Society) Member IEEE

ANDREW R. PARKER 2334 County Road 657

Farmersville, TX 75442

214-***-**** acr6r5@r.postjobfree.com

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