KANDHAVEL S.
CONTACT NO. : 979*******-**, New street, S.V.pet
E-MAIL ID : **************@*****.*** Thimiri, Vellore dist-632512
To add value to a reputed institution, facing new challenges and applying my strength to develop my knowledge through continuous learning
COURSE
YEAR OF PASSING
PERCENTAGE
INSTITUTION
M.E.-VLSI
2014
7.34
SSN College of Engineering, Chennai
B.E. – ECE
2011
72 Arunai Engineering College, Thiruvannamalai
HSC
2007
79
S R K Mt Hr Sec School, Arcot
Matric
2005
76
S R K Mt Hr Sec School, Arcot
SOFTWARE PACKAGES : Xilinx, Matlab, Mentor Graphics
PROGRAMMING LANGUAGES : Basics of C and C++, JAVA and Oracle 9i, Verilog, System Verilog,
UVM
AREAS OF INTEREST : VLSI design, Communication System, Digital Electronics
PG Title : “FPGA implementation of High Throughput SEFDM System”
Description : The future of communication with high speed transmission and effective reception
can be incorporated through this technology.
UG Title : “Dome automation using absolute rotary Encoder”
Description : In this project, to create the interface between the system and rotary encoder
using Pascal language
BSNL, Chennai
All India Radio, Kodaikanal
Attended IETE National conference on “ 4G Wireless Communication” and also participated in “MEMS” workshop conducted by SSN college of Engineering
Participated in the college level Texas Instruments Innovation challenge-India Analog Design contest, 2014
Completed Diploma in JAVA Technology at NIIT
Completed OCJP certified course
presented a paper based on “NANO DOTS” in National Level Technical symposium DESTIN_e’10 at Bajrang Engineering College.
Completed ASIC Design and Verification course at EXPERTHDL, Bangalore.
Date of Birth 19-07-1989
Father’s Name Mr. C. N. Sampath
Gender Male
Languages Known English, Tamil and Hindi
Hobbies Playing Basketball and cricket, listening to music and social networking
I hereby declare that the above-mentioned particulars are true, genuine and as per the certification
PLACE: VELLORE
DATE: (Kandhavel S)