Verilog(Intermediate),C programming(basic),Perl(intermediate),VHDL

PRATIK RAJENDRA PAREKH 889-***-**** ****************@*****.*** Flat A-

*, *** *****, ******* ****, Chembur, Mumbai-400071.

Career Objective:

To utilize my potential and ability to learn and work in VLSI & Embedded

Systems

Academic record:

Course College University Year of Percentag

Passing e

Postgraduate CDAC Noida CDAC 2014 74.5%

diploma(VLSI and

Embedded systems)

B.E (Electronics) Shah and Anchor Mumbai 2013 69.94%

Engineering University

College

12 th S K Somaiya Maharashtra 2008 64.33%

Junior college State Board

10 th OLPSHigh School Maharashtra 2006 80.13%

State Board

Technical Skills:

SOFTWARE- C Programming(Basic), Perl(Intermediate),Shell Script(basic)

Verilog(Intermediate),Logic Synthesis and Static Timing

Analysis(STA),VHDL(basic),Basic Exposure to System Verilog and

UVM(Universal Verification Methodology),C++ (basic),Linux(basic)

HARDWARE- hands on FPGA Basys2 Spartan3E programming (generating bit file,

user constraint file), Digilent Adept, hands on 8051

TOOLS- ModelSim, Xilinx ISE Design Suite 14.5, ActivePerl 5.16.3, Dev

C++,Microsoft Office, Ubuntu,Microsoft Excel,Microsoft Powerpoint

Projects:SIMULATION AND SYNTHESIS MODEL OF DS-CDMA TRANSMITTER USING

VERILOG HDL at C-DAC PROJECT November 2013 to February 2014 The blocks

included a pseudo random sequence generator, Multiplexer, Shift register,

Parity generator and the BPSK modulator.

DESIGN AND IMPLEMENTATION OF PIC BASED WIRELESS SCADA System (OUT HOUSE

PROJECT) - B.E PROJECT August 2012 to April 2013 The aim of the project was

to design a microcontroller based SCADA system to monitor parameters such

as temperature, voltage, pressure and to alert the engineer if any

parameter goes above or below a certain set of value using Zigbee

communication.

MINI PROJECTS

IMPLEMENTATION OF FAULT DETECTOR USING VHDL ON CPLDThe aim was to implement

a simple fault detector to detect and clear the fault to avoid glitches.

The fault detector was implemented on a CPLD.

SMOKE DETECTOR ALARM A smoke detector circuit was designed to alarm the

user of a fire warning when a dense smoke is detected. A loud sounding

alarm continuously beeps until the smoke clears.

Work Experience:

1. Title: Technical Intern

Company: Eduvance

Period: three months from May 6th 2014 to August 6th 2014

Responsibility: Manufacturing, debugging and testing of 8051

Microcontroller Xilinx Spartan Fpga based kits.

2. Title: Lab assistant and Assistant Faculty for VLSI and Embedded

systems

Company: Thakur Institute of Career Advancement affiliated to C-DAC

Responsibility: Taking theory lectures on selected topics in VLSI logic

Synthesis, Verilog, Perl and assisting students during VLSI practical.

Period: presently working here from September 2014(7 months)

Responsibilities:

1. Installation of Online exam system Wamp Server on LAN almost on

my own with expert advice.

2. Taken lecture for Perl Scripting according to CDAC ACTS syllabus

prescribed.

3. Also involved in conducting lecture for RTOS(theory part)and HDL

Logic Synthesis(theory part) and Static Timing Analysis

concepts.

Technical Certification and workshops:

1. Completed Industrial training programme from Advanced Level Telecom

Training Centre at BSNL, Ghaziabad.

2. Completed training programme on Advanced Embedded C from MSME

development centre, Mumbai.

3. Participated in one day training on Latest Trends in Software by

M/s Oracle India Ltd, Ghaziabad

4. Head of the event 'Fifabotics' at College Technical festival

5. Participated in the 'PC assembly and troubleshooting' workshop held

in College.

Interest:

Swimming, Reading about current affairs and latest technology trends

Contact this candidate