FPGA engineer

Harsh Maniar

*** * **** **, *** ****, Chicago, IL, 60616

Email: ***************@*****.*** Contact: 312-***-****

OBJECTIVE : To obtain a position in semiconductor/ electrical hardware engineering field where I can

utilize my work experience as FPGA design intern and education as VLSI & Microelectronics graduate,

which can improve company's operation.

EDUCATIONAL QUALIFICATION

Illinois Institute of Technology, Chicago, Illinois, USA

Masters of Electrical and Computer Engineering May 2015(GPA 3.3/4)

[VLSI & Microelectronics]

Courses: Advanced VLSI Design, Analysis of Integrated Circuits, Semiconductor Devices, CAD

Techniques, Fault Detection in Digital Circuits, Nanotechnology, Image Processing, RF Device

Modeling, Computer Architecture, Power Electronics

Gujarat Technological University, Gujarat, India

Bachelors of Electronics and Communication Engineering May 2013(GPA 8.16/10)

PROJECTS & EXPERIENCE

Experience:

FPGA Design Intern, eInfochips (2012-2013)

“Image Compression FPGA Design using VerilogHDL”

- Designed FPGA on Spartan 3 kit using Xilinx tools.

Teaching Assistant, RAJ Computers (2011-2012)

-Provided guidance for C, C++, Java, Visual Basic, HTML, Hardware Languages, UNIX and

Linux!

Projects:

"Design and Synthesis of Carry Propagation Adders "

- Designed different adders using EDA tools and verified using VerilogHDL code.

"Generate slack tables for given inputs using MinGW compiler and TCL/Tk GUI ."

“Simple Lie Detector” - Designed circuit layout based on skin resistance and implemented on PCB.

Survey Papers:

Experimental Analysis of a Ring Oscillator Network for Hardware Trojan Detection in a 90nm ASIC

technology

Power MOSFET Loss Calculation in Synchronous Buck Converter

Next generation Carbon Nanotube Field Effect Transistors for High Frequency Applications

Electronics waste management and effects on environment in third-world countries

TECHNICAL SKILLS

Hardware Languages: VHDL, Verilog HDL

Programming Languages: C, C++, Visual Basic, HTML

Scripting Language: TCL/TK

Tools: Xilinx, MATLAB, P-spice, Keil, UNIX, Cadence Virtuoso, MS Office

ACTIVITIES AND ACHIEVEMENTS

International student check -in coordinator for fall 2014 at IIT

Technology support assistant at Stuart Business School, IIT

Ranked 1st in quiz and group discussion competition held by IEEE State Level

Contact this candidate