Engineer Project

SARATH KUMAR.S

***************@*****.***

+91-948*******

OBJECTIVE

To obtain a position that will enable me to use my strong

organizational skills, educational background and ability to work well with

people.

EDUCATIONAL PROFILE

. Completed Master of Technology in VLSI Design from Sathyabama

University and secured 8.3 CGPA.

. Completed Bachelor of Engineering in Electronics and Communication

from Maamallan institute of technology under Anna University Chennai

and secured 6.88 CGPA.

. Completed Plus two from Cheran Matriculation Higher Secondary School

in 2008 and secured 84.5%.

. Completed SSLC in 2006 under Matriculation Syllabus and secured

78.34%.

TECHNICAL PROFICIENCY

. Programming Languages known : Verilog, System verilog.

. Methodologies : UVM.

. EDA Tools : Questasim, Modelsim, Xilinx-ISE.

. Scripting language : Shell, Perl.

. Platforms : Windows XP,7,8, Linux,Unix.

. Packages : MS-Office.

VLSI TRAINING

. Course : ASIC Design & Verification.

. Institute : ExpertHDL Training and consultancy services,

Bangalore.

PROJECTS DURING TRAINING

. Verification of a memory interface by building environment using APB

protocol in System Verilog.

. Verification of UART-RTL using UVM.

. Design and verification of FIFO by building environment in system

verilog.

ACHIEVEMENTS

. Published paper and presented in National conference conducted at

Sathyabama University.

. Published paper and presented in National conference on modern

electronics and signal processing conducted at Velammal Engineering

College.

EXTRA CURRICULAR ACTIVITIES

. Active member of National Service Scheme (NSS) in college level.

. Won 2nd prize in short film competition in culturals'13 conducted by

Sathyabama University.

AREAS OF INTEREST

. Digital Electronics.

. VLSI Design.

.

ACADEMIC PROJECT TITLE

PG Main Project: Design and Performance Analysis of Memristor based Adders.

Description: Memristor is a two terminal passive device in which resistance

is modulated by applied bias.

UG Main Project: A Distributed Data Collection System of Fourdriner Machine

for Green Extract Plants based On Embedded Ethernet.

STRENGTH

. Hardwork

. Sincere and dedicated person.

PERSONAL PROFILE

Father Name : Mr. S.Sivasamy.

Date of Birth : 4th july1991.

Gender : Male.

Language known : Tamil, English.

Address : 1/93 Muniappanur, Vangal (PO), Karur (DT)

Pin: 639116.

Place:

Date :

(S. SARATH KUMAR)

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