Jobs in VLSI design

KRISHNA KUMAR.E

HSR Layout,

Agara,

Bangalore -560034,

Phone: 979*******

INDIA.

E-mail: ****************@*****.***

OBJECTIVE:

Willing to work in a challenging environment where I

can efficiently contribute my skills, thereby benefiting the organization

and furthering my career.

EDUCATIONAL QUALIFICATIONS:

Qualification Institution Board/University Percentage Year

of

Passed

M.Tech. Hindustan Hindustan

(VLSI Design) Institute of University, 8.64 CGPA 2012

Technology and Chennai.

Science, Chennai.

B.E.(Electronic Maharaja Prithvi Anna University,

s & Engineering Chennai. 69.00% 2010

Communication College,

Engineering) Coimbatore.

H.S.C. GHS School, State Board, T.N. 73.16% 2006

Erode.

S.S.L.C. GHS School, State Board, T.N. 86.20% 2004

Erode.

Additional Edu.Qualifications:

Course Institute Duration Year

Certification course on ASIC front CVC, Bangalore 6 months 2013

end Design and Verification using

System Verilog and UVM

Programming on C & C++ NIIT, 3 months 2009

Coimbatore

EXPERIENCES:

. ASIC Design Verification Engineer Trainee at CVC Pvt Ltd, Bangalore.

(6 months)

TECHNICAL SKILLS:

Languages : C, C++ Basics, UNIX Commands.

HDLs : Verilog

HVLs : System Verilog, System Verilog Assertions

Methodologies : UVM (Universal Verification Methodology)

Tools : QuestaSim, ModelSim, MPSim, Rivera Pro,

Quartus, Xilinx ISE.

PROJECTS:

Project 01:

Project Title : Design & Verification of AMBA APB Design

Language Used : UVM (Universal Verification Methodology)

Project Description: AMBA APB Design was verified through Universal

Verification Methodology Test bench Verification Method.

Project 02

Project Title : Verification of FIFO Design

Language Used : System Verilog HVL

Project Description: FIFO (First-In First-Out) Design was verified through

System Verilog Full Layered Test bench Verification Method.

Project 03

Project Title : Design & Verification of ALU Design

Language Used : System Verilog HVL, Verilog HDL

Project Description: ALU Design was verified through System Verilog Full

Layered Test bench Verification Concepts.

Project 04:

Project Title : Design of Efficient Multiplier using BEC

Language Used : Verilog HDL, VHDL

Project Description: In this project the performance of carry select and

modified carry select adders are analysed. Modified carry select adder

(CSLA) have lowest delay compare to carry select adder. Carry select adder

is one of the fastest adders used in many data-processing processors to

perform fast arithmetic functions. From the structure of the CSLA, there

is a possibility for reducing the area and power consumption in the

CSLA.the designed SQRT CSLA is used to design a 32 -bit multiplier as a

application.

Project 05:

Project Title : City Bus Information System

Language Used : Embedded C

Project Description: This project mainly involves three applications weight

monitoring system for avoid over weights in buses and prevent from

accidents. Then gas monitoring system (carbon mono oxide sensor) for

control pollution and bus in/out timings monitoring system for reduce human

work and transport applications.

CO-CURRICULAR ACTIVITIES:

. Presented a Paper on "Design of Efficient Multiplier Using BEC" at

National Conference PEPCCI, Sardar Vallabhai Patel Institute of

Technology, Gujarat.

. Presented a presentation on "Bus Monitoring Systems for Transport

Applications" at SYNAPSE Student Symposium, Thiagarajar College of

Engineering, Madurai.

. Presented a Paper on "Efficient Adder Using Binary to Excess-1

Converter" at National Conference NCIPSC, St Peter University,

Chennai.

. Industrial Visit at CENTRAL POWER RESEARCH INSTITUTE (CPRI),

Bangalore.

. Implant Training at BHARAT SANCHAR NIGAM LTD (BSNL), Coimbatore.

. Attended Workshop on 'FUTURE POWER SYSTEMS' conducted by Hindustan

University, Chennai.

EXTRA CURRICULAR ACTIVITES:

. Sports Person in athletic events.

. Quiz Competitions, Got School First Prize in Quiz at XI-Std.

PERSONAL DETAILS:

Father's Name : Mr. N. Elangovan.

Mother's Name : Mrs. E. Rathinam.

DOB : 18-07-1988.

Languages : English and Tamil.

Hobbies : Music, Cricket and Gardening.

Permanent Address : P-8, Karaimettu Thottam,

Kittampatti, Chennampatti

(post),

Anthiyur (tk), Erode (dt), TN-

638504, INDIA.

DECLARTION:

I, E.KRISHNA KUMAR hereby declare that all the above furnished

information and particulars are true to the best of my knowledge and

belief.

Date:

Place:

(E.KRISHNA KUMAR)

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