M.Tech in VLSI Design & embedded systems from PESIT-2014.

Gouridevi R Haranal

E-mail : ************@*****.*** Phone : +91-812*******

Address : Green-109, My Home Rainbow Apts., Sheikpet Nala,

Tolichowki, Hyderabad-500008.

Career Objective

Seeking a challenging position in a dynamic organization, that utilizes my analytical skills and learning abilities providing

opportunities to exhibit and enhance my skills.

Qualifications

M.Tech VLSI Design & embedded System.

B.Tech Instrumentation & Control Engineering.

Education

M.Tech VLSi Design & Embedded Systetm 2012 2014

PESIT, Visvesvaraya Technological University, Bangalore.

79%

B.Tech Istrumentation & Control 2006 2010

Engineering

G. Narayanamma Institute of Technology & Sciences, Hyderabad.

65.61%

Board of Intermediate Education. 2004 2006

Narayana Junior College, Hyderabad.

91%

Board of Secondary Education. 2003 2004

Kakatiya Vidya Niketan High School, Hyderabad.

86.67%

Projects

M.Tech Main Project

Title: I mplementation of CDMA in Wireless Technology

Language: VHDL, MATLAB

G o urid e vi R Haranal 1

Duration: 1 year

Abstract: In a typical code based communication topology (CDMA), no matter which form of technique is employed, the

timing information of the transmitted signal is required to be in order to de-spread the received signal and demodulate the

same. For a CMDA DS-SS system, if the received signal is off even by single chip duration, it is not possible to de-

spread the received spread spectrum signal, since the spread sequence is designed to have a small out-of-phase

autocorrelation magnitude. Therefore, the process of acquiring the timing information of the transmitted spread spectrum

signal is essential to the implementation of any form of spread spectrum technique. The code acquisition technique is

chosen and the system is designed and verified using MATLAB Simulink. The received signal will be demodulated to

obtain data. Then it is realized as RTL schematic using Quartus II and implemented on FPGA board Altera DE0 Nano.

M.Tech mini project

Title: Current Comparison based Domino: New Low Leakage high Speed for Wide Fan IN Gates.

Tool: CADENCE Virtuoso

Duration: 4 months

Abstract: Dynamic logics being more advantageous than static logics in achieving high performance, faster and requiring

less area but are more complex in designing. A new Domino circuit is proposed, the technique used is based on

comparision of mirrored current, the circuit decreases the parasitic capacitance on the dynamic node so that we can

implement wide Fan In gates with increased speed and robustness.

B.Tech Main Project

Title: Micro-controller based Multi-level parking system.

Tool: µVision 2, Keil software

Language: Assembly language Programming

Duration: 6 months

Abstract: In reference to the parking space problem a multi-level parking system was modelled. Lift is used to place the

vehicle in the required slot assigned by the user. Lift consists of three gear motor of 10RPM each which are used for

driving mechanism. The AT89C52 microcontroller is used to control the operation of ULN2803 motor driver, 16x2 LCD

display and switches.

B.Tech mini project

Title: I nfrared Proximity detector

Duration : 4 months

Abstract: A walking stick for the visually challenged people using the infrared distance sensor will be advantageous

because this kind of walking stick is able to detect the object in the specific range. In this project the distance range

used is 10cm to 80 cm. When an object is detected, sound alarm from a buzzer will alert the user about the object and

the person can avoid the object safely without hitting the object. As the distance of the object and the user is closer, the

loudness of the buzzer is increasing. The user is able avoid the obstacles better using the newly designed walking stick

Work experience

Cosine Communications & Electronics Pvt. 2010 2012

Ltd., Hyderabad.

Quality Assurance Executive.

Incoming inspection, in process inspection and final inspection of DC Thyristor switched

power supply equipments.

Technical Skills

Operating Systems Windows 8,7, 2003, Linux, Unix

Languages VHDL, Verilog, System Verilog, Perl.

G o urid e vi R Haranal 2

Tools ModelSim, Xilinx, Matlab.

Layout Editor Cadence

Good at Digital Design through Verilog HDL, Analog and Digital Electronics, Circuit Designing, Static timing Verification.

Course

Attending a course on "Layout Designing" at kanada Technologies, Bangalore.

Interpersonal Skills

Project Management & Problem Solving

Good communication & Presentation skills

Team worker

P ositive Attitude

Flexible.

Achievements

GATE Scholarship in 2012 with percentile of 92.27

Received Distinction award from PESIT for securing first class with distinction in I, II, III semester of M.Tech

VLSI Design and Embedded Systems.

Won 3rd prize at INSTRUSPARK in mini project exhibition for the project “ Infrared Proximity detector".

Completed a foundation program held by Infosys Campus Connect.

Presented a technical paper on nano robotics at METALLON.

Attended an OPEN LECTURE SERIES ON ADVANCED SCIENCE AND TECHNOLOGY organized by PES

Institute of Technology.

Won Bala Ratan award for Painting.

Co Curricular Activities

Won 1st prize for water color painting at decennial celebrations GNITS.

Won 1st prize for antakshari at Sanskruthi, GNITS cultural club.

Won 3rd prize for badminton at RBI staff co-operative credit society ltd., Hyderabad.

Won a cash award for meritorious performance in PUC from Board of Directors of RBI Employees Co-operative

Ltd., Bangalore.

Received appreciation certificate for meritorious performance in SSC from RBI staff co-operative credit society

Ltd., Mumbai.

Volunteer at Youth for Seva Hyderabad.

Took part in Voluntary Blood Donation Camp held by PESIT's CSR Club.

G o urid e vi R Haranal 3

Took part in Voluntary Blood Donation Camp held by PESIT's CSR Club.

Hobbies

Panting, Swimming, Yoga, Reading books, Music.

Languages known

Kannada, English, Hindi, Telugu.

Personal Details

Name: Gouridevi R Haranal

Father's name: Mr. R B Haranal

Date of Birth: 14th September 1988

Marital status: Unmarried

Local address:

S rinivasa PG for Ladies,

Room no. 303,

OM plaza, 7th cross, 20th main,

BTM 1st stage, Bangalore - 68.

Permanent address:

Green-109, My Home Rainbow Apts.,

Sheikpet nala, tolichowki,

Hyderabad - 500008.

References

Dr. B S Katkol

Director & Principal(Rtd), BLD Engineering College, Bijapur.

Contact: 944-***-****.

Mr. G Raghavaiah

Managing Director, Cosine Communications & Electronics Pvt. Ltd., Hyderabad.

Contact: 944*******.

G o urid e vi R Haranal 4

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