Engineering Project
Resume:
HARI S
Mahalingapuram (post),
Pollachi -642002,
Coimbatore, Tamilnadu, Contact No:
India. E-mail: *********@*****.***
CAREER OBJECTIVE
To position myself as a good professional, enabling my professional conduct for the
betterment of the organization
ACADEMIC PROFICIENCY
• Completed M.E (VLSI Design) with an aggregate of 8.12 CGPA in the year 2013
from Sri Eshwar College of Engineering, Kinathukadavu.
• Completed B.E (EEE) with an aggregate of 74% in the year 2008 from
Dr.Mahalingam College of Engineering and Technology, Pollachi.
• Completed DEEE with an aggregate of 90% in the year 2005 from Nachimuthu
Polytechnic College, pollachi.
• Completed SSLC with an aggregate of 74% in the year 2002 from Keshav Vidhya
Mandhir Matriculation Higher Secondary School, Pollachi.
WORK EXPERIENCE DETAILS
• Currently I am working as an Electrical Site Engineer in a private concern in pollachi.
• One Year Teaching Experience as an Assistant Professor (EEE Department) in VSB
College of Engineering Technical Campus, Coimbatore from July 2013 – July 2014.
• Three Years Industry Experience as an Electrical Site Supervisor and have done some
Competency level Electrical Works in pollachi from June 2008 - April 2011.
•
AREAS OF INTEREST
• Electrical Engineering
• Linear Integrated Circuits
• Basics of VLSI
PG PROJECT
Project Title : Device Threshold Based CMOS Differential Logic Style to Reduce PDP
Tool Used : Microwind with DSCH, Xilinx/Modelsim
Description
This Project describes a novel low-voltage CMOS differential logic operating with
supply voltage approaching the MOS threshold voltage.Test sets of logic gates were designed in
a 90 nm CMOS process.
UG PROJECT
Project Title : Speed Control of DC Motor using Digital PID Controller
Tool Used : Keil C Software
Description :
This project aims at using PID technique for the speed control of DC motor. An IR sensor
is placed in the shaft of the motor. The technology exposure in this chapter is the use of PID
technology.
COMPUTER SKILLS:
• Languages : C, C++ beginner
• Operating system : Windows Series
• Packages : MS Office, MATLAB, Xilinx, AutoCAD,Microwind
CO-CURRICULAR ACTIVITIES
CONFERENCES ATTENDED
• Presented a paper in an SET based International conference on VLSI Architecture of
Arithmetic Coder Used in SPIHT held at VIT University, Vellore.
• Presented a paper titled Reduction of Standby Leakage Power in CMOS VLSI
Systems in NCINCT based National Conference held at Dr.Mahalingam college of
Engineering& Technology, Pollachi.
• Presented a paper titled Device Threshold Based CMOS Differential Logic Style to
Reduce PDP in ESPEED based National Conference held at KSR College of
Technology, Tiruchengode.
WORKSHOPS ATTENDED
• Attended a workshop on VHDL Programming and Practice at Bannari Amman
Institute of Technology, Sathyamangalam.
• Attended a workshop on Image Classification and Retrieval organized by the Digital
Media Computing (DMC) Division, School of Computing Science and Engineering
(SCSE) held from 27.7.2012 to 28.7.2012 at VIT University, Vellore.
• Attended the national workshop on Emerging trends in embedded systems colliding
hardware and software at CIT, Coimbatore.
JOURNALS PUBLISHED
• Published a Paper titled,” Device Threshold Based CMOS Differential Logic Style to
Reduce PDP” in International Journal of Engineering Research and Technology
(IJERT) in Vol.2 Issue 4,April-2013 (ISSN:2778-0181)
EXTRA-CURRICULAR ACTIVITIES
• Completed a certified course on Computer Telephony Integration
• Completed three certified exams in Sanskrit Language
• Completed a certified course on 2-D Drafting Package
PERSONAL DETAILS
Date of Birth : 18-11-1986
Father’s Name : Mr.V.Subramanian
Mother’s Name : Mrs.S.Devi
Religion : Hindu
Nationality : Indian
Gender : Male
Marital Status : Single
Hobbies : Playing cricket, Surfing Net
Languages Known : English, Tamil, Malayalam and Hindi
DECLARATION
I do hereby declare that all the information mentioned above is true to my knowledge.
Place : POLLACHI
Date : (S.Hari)
Contact this candidate