Project Training

Curriculum Vitae

DEVESH PANDEY

Email ID : ***************@*****.***

Telephone : 989-***-****

OBJECTIVE

I would like to associate my self with a technology progressive and

team oriented organization, which uses my innovative concepts and provides

me opportunities to move forward and expand my knowledge.

PROFESSIONAL QUALIFICATION

. Master in Technology in VLSI System and Design with 78 % from Graphic

Era University in a batch 2012-2014

* Bachelor in Technology in Electronics and Communication Engineering

with 63% from Uttarakhand Technical University in a batch 2007-2011

(Amrapali Institute of Technology and Sciences)

EDUCATIONAL QUALIFICATION

* Passed 10th with 68.81% in 2005 from C.B.S.E. Board with Science,

Maths as major subjects.

* Passed 12th with 71.6% in 2007 from C.B.S.E. Board with Science,

Computer Science, Maths as major subjects.

.

INDUSTRIAL TRAINING PROJECTS

1. Organization - Bharat Sanchar Nigam Limited (B.S.N.L),

Haldwani

Branch - Telecom

Field of Training - Practical Training on Satellite

Communication, CDMA

and Mobile Switching

Period - 7 weeks

2. Organization - Bharat Heavy Electricals Limited

(B.H.E.L), Haridwar

Branch - Telecom

Field of Training - I.D.F/M.D.F Testing, NTC Connections and

all line Testing

Period - 3 weeks

SKILLS AND KNOWLEDGE ACQUIRED THROUGH EDUCATION

. M.Tech Project-One Year Project on "Study and Implementation of Image

and Video Based Denoising Algorithms" from Instruments Research and

Development Establishment (DRDO, Ministry of Defence), Dehradun

. Seminar at Various Image Processing Techniques

. B.Tech Project-Automatic Room Light Controller with Visiting Counter

. Seminar at MOSFET

CERTIFIED COURSES

. Certification on Microcontroller 8051 from Wireless Embedded Solutions

and Technologies Private Limited (W.E.S.T), Chennai

. Certification on Verilog HDL from Cetpa Infotech Pvt. Ltd, Dehradun

. Certification on Microsoft Visual Studio (C#. Net) From M.I.T,

Trivandrum

TECHNICAL SKILLS

. VHDL

. Strong Knowledge of Verilog HDL

. MATLAB

. C/ C++, Java

. Strong Knowledge of Cadence Tool

. C#. Net

AREAS OF INTEREST

. Digital electronics

. Signals and Systems

. Digital Image processing

. Digital Systems Design Using VHDL/Verilog HDL

WORKING EXPERIENCE

. Fresher

STRENGTH

. I am an optimist. Learning from my mistakes and not repeating them

again makes me more confident as a person.

. Possess strong will power. I am not afraid of the challenges ahead but

I am getting prepared for it.

. A determined and hardworking person. Striving hard to achieve my goals

is my priority.

PERSONAL DETAILS

Name : DEVESH PANDEY

Father's Name : : Mr. C.K.PANDEY

Date of Birth : 30 may 1990

Sex : Male

Mailing Address : Bhudeep Bhawan, Atul Annu Vihar, Near Pilikothi

Chauraha, Haldwani, Nanital

Contact No. : 989-***-****,093********

Email ID : ***************@*****.***

Nationality : Indian

Languages Known : English, Hindi

Strength : Hard Working, Self Motivated, Good Team leader

PAN Card No. : BZDPP8992D

DECLARATION

I hereby declare that all the information given above is correct to best of

my knowledge and belief.

Place: Dehradun (DEVESH PANDEY)

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