intern (RTL verification)

SHYAM SUNDER

Mobile - +917*********

E mail - ***************@*****.***

Address - Flat No-301, Plot No-18, 2nd Cross, Near SGR Dental College,

Marathahalli,

Bangalore, Karnataka - 560037

CAREER OBJECTIVE

To be a part of the challenging team which strives for the better growth of

the organization and which explores my potential in terms of technical and

analytical skills and provides me with the opportunity to enhance my talent

with an intention to be an asset to the company.

CORE COMPETENCY

- Good knowledge of VHDL and Verilog RTL coding.

- Good knowledge of System Verilog for verification.

- Verification methodology basics of OVM/UVM.

- Skilled in writing test plans for DUT's.

- Good knowledge of ASIC design flow.

- Good knowledge of Assembly, C, C++.

- Implemented VLSI and Embedded projects during B.tech and PG

Diploma.

- Good Exposure to technology by PG Diploma in VLSI and Embedded H/W

Design.

- Having practical experience of EDA tools Xilinx ISE, Altera Quartus

II, ModelSim, Kiel u Vision, OrCad.

INTERNSHIP

Currently pursuing internship in SION SEMICONDUCTORS, Bangalore.

Responsibilities: Creating verification environments and developing

different test cases and checking the correctness of design under test.

EDUCATIONAL QUALIFICATION

2013 PG Diploma in VLSI and Embedded hardware design from NIELIT

(formerly DOAECC),

Calicut (Aug 2012-Feb 2013).

2012 Bachelors in Technology - Electronics & Communication Engineering

from SCITM, Biju Patnaik University of Technology. Secured 7.09 CGPA

aggregate.

2008 H.S.C. from D.A.V College, Orissa, CHSC Board. Secured 54.8%.

2006 S.S.C. from Kendriya Vidyalaya no.3, New Delhi, CBSE Board. Secured

71 %.

TRAINING

- Vocational training at NALCO, Damanjodi.

- Basic electronics and Motor Winding from Hindustan Electronics.

- DTP Course from Line and Lakeer.

IT FORTE

Operating System : Windows, Linux

Languages : VHDL, Verilog HDL, C, C++, System Verilog

VLSI & Embedded System : FPGAs (Xilinx & Altera), Microcontroller

(8051)

EDAs : Altera Quartus II,

Xilinx ISE, Modelsim SE, Synopsis VCS, Questasim

ORCAD, Keil VISION

Hardware kits : CYCLONE I CYCLONE II,

CYCLONE IV, Spartan 3A & 3AN

PROJECTS DESIGNED

SYSTEM VERILOG BASED VERIFICATION OF IPs

Developed a System Verilog based verification environment including

all possible test cases and checked the correctness of the design

under test (SRAM,FIFO and DUAL PORT RAM) using Synopsys VCS and

QUESTASIM.

PROTOTYPE OF RISC-SPM MICROPROCESSOR

Designed the architecture of RISC Processor using VHDL and Verilog HDL

language. Processor includes Registers, Data paths, Control lines and

an ALU with a set of 15 instructions and also designed a test bench to

verify the processor and control unit operation.

REAL TIME CLOCK

Designed real time clock with timer and alarm capabilities along with

LCD interface using VHDL and Embedded C and Synthesized the code in

Spartan 3AN kit and 8051 trainer kit.

IR REMOTE RECEIVER

Developed IR receiver's embedded C code compatible to Philips

RC5 remote control signal

specifications.

RF BASED DOOR ACCESS SYSTEM

Implemented the embedded C code using Keil VISION and

designed and assembled the PCB.

PERSONAL STRENGTH

- Hardworking & Good team worker

- Innovative Thinker and Problem Solver

- Possesses good communication and interpersonal skills

HOBBIES

- Drawing, Dancing, Internet Surfing.

EXTRA CURRICULAR ACTIVITIES

- Represented the school in cricket matches/Drawing.

- Represented the college in dancing/LAN games.

PERSONAL PROFILE

Date of Birth : December 10th, 1990

Permanent Address :

10/64, Nagomi Cottage, Aruvankadu

Nilgiris, TN-643202

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